Lines Matching defs:PhiReg

4463                        unsigned InitReg, unsigned ResultReg, unsigned PhiReg,
4478   BuildMI(LoopBB, I, DL, TII->get(TargetOpcode::PHI), PhiReg)
4553                unsigned InitResultReg, unsigned PhiReg, int Offset,
4582                                       InitResultReg, DstReg, PhiReg, TmpExec,
4710   Register PhiReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
4716   auto InsPt = loadM0FromVGPR(TII, MBB, MI, InitReg, PhiReg, Offset,
4815   Register PhiReg = MRI.createVirtualRegister(VecRC);
4818   auto InsPt = loadM0FromVGPR(TII, MBB, MI, SrcVec->getReg(), PhiReg, Offset,
4827         .addReg(PhiReg)
4835         .addReg(PhiReg)