Lines Matching defs:MemVT

1677 bool SITargetLowering::canMergeStoresTo(unsigned AS, EVT MemVT,
1680 return (MemVT.getSizeInBits() <= 4 * 32);
1683 return (MemVT.getSizeInBits() <= MaxPrivateBits);
1686 return (MemVT.getSizeInBits() <= 2 * 32);
2009 SDValue SITargetLowering::convertArgType(SelectionDAG &DAG, EVT VT, EVT MemVT,
2015 VT.getVectorNumElements() != MemVT.getVectorNumElements()) {
2017 EVT::getVectorVT(*DAG.getContext(), MemVT.getVectorElementType(),
2025 VT.bitsLT(MemVT)) {
2027 Val = DAG.getNode(Opc, SL, MemVT, Val, DAG.getValueType(VT));
2030 if (MemVT.isFloatingPoint())
2041 SelectionDAG &DAG, EVT VT, EVT MemVT, const SDLoc &SL, SDValue Chain,
2049 if (MemVT.getStoreSize() < 4 && Alignment < 4) {
2054 EVT IntVT = MemVT.changeTypeToInteger();
2067 ArgVal = DAG.getNode(ISD::BITCAST, SL, MemVT, ArgVal);
2068 ArgVal = convertArgType(DAG, VT, MemVT, SL, ArgVal, Signed, Arg);
2075 SDValue Load = DAG.getLoad(MemVT, SL, Chain, Ptr, PtrInfo, Alignment,
2079 SDValue Val = convertArgType(DAG, VT, MemVT, SL, Load, Signed, Arg);
2104 // For NON_EXTLOAD, generic code in getLoad assert(ValVT == MemVT)
2106 MVT MemVT = VA.getValVT();
2112 MemVT = VA.getLocVT();
2128 MemVT);
2929 EVT MemVT = VA.getLocVT();
2951 if (MemVT.getStoreSize() < 4 && Alignment < 4) {
2955 EVT IntVT = MemVT.changeTypeToInteger();
2971 ArgVal = DAG.getNode(ISD::BITCAST, DL, MemVT, ArgVal);
2972 NewArg = convertArgType(DAG, VT, MemVT, DL, ArgVal,
3013 // MemVT and just do a bitcast. If MemVT is less than 32-bits we add a
3015 // MemVT may be smaller.
3017 EVT::getIntegerVT(*DAG.getContext(), MemVT.getSizeInBits());
3018 if (MemVT.bitsLT(NewArg.getSimpleValueType()))
3021 NewArg = DAG.getBitcast(MemVT, NewArg);
3022 NewArg = convertArgType(DAG, VT, MemVT, DL, NewArg,
3028 lowerKernargMemParameter(DAG, VT, MemVT, DL, Chain, Offset,
8805 EVT MemVT = VData.getValueType();
8806 return DAG.getMemIntrinsicNode(NewOpcode, DL, Op->getVTList(), Ops, MemVT,
8833 EVT MemVT = VData.getValueType();
8834 return DAG.getMemIntrinsicNode(NewOpcode, DL, Op->getVTList(), Ops, MemVT,
9358 ArrayRef<SDValue> Ops, EVT MemVT,
9392 EVT WidenedMemVT = EVT::getVectorVT(C, MemVT.getVectorElementType(), 4);
9402 return DAG.getMemIntrinsicNode(Opcode, DL, VTList, Ops, MemVT, MMO);
10189 EVT MemVT = Ld->getMemoryVT();
10190 if ((MemVT.isSimple() && !DCI.isAfterLegalizeDAG()) ||
10191 MemVT.getSizeInBits() >= 32)
10196 assert((!MemVT.isVector() || Ld->getExtensionType() == ISD::NON_EXTLOAD) &&
10207 EVT TruncVT = EVT::getIntegerVT(*DAG.getContext(), MemVT.getSizeInBits());
10208 if (MemVT.isFloatingPoint()) {
10211 TruncVT = MemVT.changeTypeToInteger();
10253 EVT MemVT = Load->getMemoryVT();
10255 if (ExtType == ISD::NON_EXTLOAD && MemVT.getSizeInBits() < 32) {
10256 if (MemVT == MVT::i16 && isTypeLegal(MVT::i16))
10266 EVT RealMemVT = (MemVT == MVT::i1) ? MVT::i8 : MVT::i16;
10271 if (!MemVT.isVector()) {
10273 DAG.getNode(ISD::TRUNCATE, DL, MemVT, NewLD),
10281 for (unsigned I = 0, N = MemVT.getVectorNumElements(); I != N; ++I) {
10289 DAG.getBuildVector(MemVT, DL, Elts),
10296 if (!MemVT.isVector())
10305 Alignment.value() < MemVT.getStoreSize() && MemVT.getSizeInBits() > 32) {
10318 unsigned NumElements = MemVT.getVectorNumElements();
10323 if (MemVT.isPow2VectorType() ||
10340 if (MemVT.isPow2VectorType() ||
10392 if (allowsMisalignedMemoryAccessesImpl(MemVT.getSizeInBits(), AS,
10397 if (MemVT.isVector())
10402 MemVT, *Load->getMemOperand())) {
11304 EVT MemVT,
11332 Type *Ty = MemVT.getTypeForEVT(*DCI.DAG.getContext());
12075 auto MemVT = L->getMemoryVT();
12076 return !MemVT.isVector() && MemVT.getSizeInBits() == 16;