Lines Matching defs:Src0

615   // Special case for s_fmac_f32 if we are trying to fold into Src0 or Src1.
617   // If folding for Src0 happens first and it is identical operand to Src1 we
1218   MachineOperand *Src0 = getImmOrMaterializedImm(MI->getOperand(Src0Idx));
1222       Src0->isImm()) {
1223     MI->getOperand(1).ChangeToImmediate(~Src0->getImm());
1233   if (!Src0->isImm() && !Src1->isImm())
1239   if (Src0->isImm() && Src1->isImm()) {
1241     if (!evalBinaryInstruction(Opc, NewImm, Src0->getImm(), Src1->getImm()))
1257   if (Src0->isImm() && !Src1->isImm()) {
1258     std::swap(Src0, Src1);
1316   MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0);
1318   if (!Src1->isIdenticalTo(*Src0)) {
1319     auto *Src0Imm = getImmOrMaterializedImm(*Src0);
1335       TII->get(Src0->isReg() ? (unsigned)AMDGPU::COPY : getMovOpc(false));
1354   MachineOperand *Src0 = getImmOrMaterializedImm(MI.getOperand(1));
1355   if (!Src0->isImm() || Src0->getImm() != 0xffff)
1531     const MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0);
1533     if (!Src0->isReg() || !Src1->isReg() ||
1534         Src0->getReg() != Src1->getReg() ||
1535         Src0->getSubReg() != Src1->getSubReg() ||
1536         Src0->getSubReg() != AMDGPU::NoSubRegister)
1554     return Src0;
1679     const MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0);
1681     if (Src0->isImm()) {
1682       ImmOp = Src0;
1686       RegOp = Src0;
1716     const MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0);
1719     if (Src0->isReg() && Src1->isReg() && Src0->getReg() == Src1->getReg() &&
1720         Src0->getSubReg() == Src1->getSubReg() &&
1725       return std::pair(Src0, SIOutMods::MUL2);