Lines Matching defs:MRI

39                                     const MachineRegisterInfo &MRI) {
41 const auto RC = MRI.getRegClass(Reg);
42 auto STI = static_cast<const SIRegisterInfo*>(MRI.getTargetRegisterInfo());
53 const MachineRegisterInfo &MRI) {
64 switch (auto Kind = getRegKind(Reg, MRI)) {
81 const TargetRegisterInfo *TRI = MRI.getTargetRegisterInfo();
83 Sign * TRI->getRegClassWeight(MRI.getRegClass(Reg)).RegWeight;
246 const MachineRegisterInfo &MRI) {
253 MRI.getMaxLaneMaskForVReg(MO.getReg()) :
254 MRI.getTargetRegisterInfo()->getSubRegIndexLaneMask(MO.getSubReg());
260 const MachineRegisterInfo &MRI) {
277 UseMask = MRI.getMaxLaneMaskForVReg(Reg);
284 UseMask = getLiveLaneMask(LI, InstrSI, MRI);
296 const MachineRegisterInfo &MRI) {
297 return getLiveLaneMask(LIS.getInterval(Reg), SI, MRI);
301 const MachineRegisterInfo &MRI) {
307 assert(LiveMask == (LiveMask & MRI.getMaxLaneMaskForVReg(LI.reg())));
310 LiveMask = MRI.getMaxLaneMaskForVReg(LI.reg());
317 const MachineRegisterInfo &MRI) {
319 for (unsigned I = 0, E = MRI.getNumVirtRegs(); I != E; ++I) {
323 auto LiveMask = getLiveLaneMask(Reg, SI, LIS, MRI);
334 MRI = &MF.getRegInfo();
343 MaxPressure = CurPressure = getRegPressure(*MRI, LiveRegs);
351 MRI = &MRI_;
358 assert(MRI && "call reset first");
373 LaneBitmask DefMask = getDefRegMask(MO, *MRI);
377 ECDefPressure.inc(Reg, LaneBitmask::getNone(), DefMask, *MRI);
380 DefPressure.inc(Reg, LaneBitmask::getNone(), DefMask, *MRI);
389 CurPressure.inc(Reg, PrevMask, LiveMask, *MRI);
402 collectVirtualRegUses(RegUses, MI, LIS, *MRI);
407 CurPressure.inc(U.RegUnit, PrevMask, LiveMask, *MRI);
414 assert(CurPressure == getRegPressure(*MRI, LiveRegs));
422 MRI = &MI.getParent()->getParent()->getRegInfo();
434 assert(MRI && "call reset first");
466 CurPressure.inc(MO.getReg(), PrevMask, It->second, *MRI);
475 CurPressure.inc(MO.getReg(), It->second, LaneBitmask::getNone(), *MRI);
498 LiveMask |= getDefRegMask(MO, *MRI);
499 CurPressure.inc(Reg, PrevMask, LiveMask, *MRI);
553 const auto LISLR = llvm::getLiveRegs(SI, LIS, *MRI);
559 << print(LISLR, *MRI);
560 reportMismatch(LISLR, TrackedLR, MRI->getTargetRegisterInfo());
564 auto LISPressure = getRegPressure(*MRI, LISLR);
574 const MachineRegisterInfo &MRI) {
575 return Printable([&LiveRegs, &MRI](raw_ostream &OS) {
576 const TargetRegisterInfo *TRI = MRI.getTargetRegisterInfo();
577 for (unsigned I = 0, E = MRI.getNumVirtRegs(); I != E; ++I) {
603 getRegLiveThroughMask(const MachineRegisterInfo &MRI, const LiveIntervals &LIS,
620 LaneBitmask RegMask = MRI.getMaxLaneMaskForVReg(Reg);
629 const MachineRegisterInfo &MRI = MF.getRegInfo();
630 const TargetRegisterInfo *TRI = MRI.getTargetRegisterInfo();
650 OS << PFX " mis LIS: " << llvm::print(LISLR, MRI)
674 LiveIn = LiveOut = getLiveRegs(MBBStartSlot, LIS, MRI);
675 RPAtMBBEnd = getRegPressure(MRI, LiveIn);
693 RPT.reset(MRI, MBBEndSlot);
708 OS << PFX " Live-in: " << llvm::print(LiveIn, MRI);
710 ReportLISMismatchIfAny(LiveIn, getLiveRegs(MBBStartSlot, LIS, MRI));
726 OS << PFX " Live-out:" << llvm::print(LiveOut, MRI);
728 ReportLISMismatchIfAny(LiveOut, getLiveRegs(MBBEndSlot, LIS, MRI));
735 MRI, LIS, Reg, MBBStartSlot, MBBEndSlot, MaskIntersection);
740 OS << PFX " Live-thr:" << llvm::print(LiveThrough, MRI);
741 OS << printRP(getRegPressure(MRI, LiveThrough)) << '\n';