Lines Matching defs:MaxWaitStates

1989     const int MaxWaitStates = 4;
1992       getWaitStatesSinceDef(AMDGPU::EXEC, IsVALUFn, MaxWaitStates);
1995     if (WaitStatesNeeded < MaxWaitStates) {
1997         const int MaxWaitStates = 2;
2003           getWaitStatesSinceDef(Use.getReg(), IsVALUFn, MaxWaitStates);
2006         if (WaitStatesNeeded == MaxWaitStates)
2027     const int MaxWaitStates = 18;
2044                                                    MaxWaitStates);
2075     if (WaitStatesNeeded == MaxWaitStates)
2095       getWaitStatesSinceDef(Reg, IsAccVgprWriteFn, MaxWaitStates);
2098     if (WaitStatesNeeded == MaxWaitStates)
2106     const int MaxWaitStates = 13;
2120     int WaitStatesSince = getWaitStatesSince(IsSrcCMFMAFn, MaxWaitStates);
2219     const int MaxWaitStates = 19;
2238       getWaitStatesSinceDef(Reg, IsLegacyVALUNotDotFn, MaxWaitStates);
2242         getWaitStatesSinceDef(Reg, IsOverlappedMFMAFn, MaxWaitStates);
2359     if (WaitStatesNeeded == MaxWaitStates)
2388     const int MaxWaitStates = 2;
2391       getWaitStatesSinceDef(Reg, IsAccVgprReadFn, MaxWaitStates);
2394     if (WaitStatesNeeded == MaxWaitStates)
2404       return getWaitStatesSinceDef(Reg, IsVALUFn, 2 /*MaxWaitStates*/) <
2409       getWaitStatesSince(IsVALUAccVgprRdWrCheckFn, MaxWaitStates);
2517     const int MaxWaitStates = 19;
2526                                                      MaxWaitStates);
2558           getWaitStatesSinceDef(Reg, IsMFMAWriteFn, MaxWaitStates);
2564       int NeedWaitStates = MaxWaitStates;
2606       if (WaitStatesNeeded == MaxWaitStates)
2636     const int MaxWaitStates = 19;
2643                                                    MaxWaitStates);
2650         getWaitStatesSinceDef(Reg, IsMFMAWriteFn, MaxWaitStates);
2652       int NeedWaitStates = MaxWaitStates;
2691       if (WaitStatesNeeded == MaxWaitStates)
2720     int NeedWaitStates = MaxWaitStates;