Lines Matching defs:MovMI
63 MachineInstr *createDPPInst(MachineInstr &OrigMI, MachineInstr &MovMI,
68 MachineInstr *createDPPInst(MachineInstr &OrigMI, MachineInstr &MovMI,
206 MachineInstr &MovMI,
210 assert(MovMI.getOpcode() == AMDGPU::V_MOV_B32_dpp ||
211 MovMI.getOpcode() == AMDGPU::V_MOV_B64_dpp ||
212 MovMI.getOpcode() == AMDGPU::V_MOV_B64_DPP_PSEUDO);
223 auto *RowMaskOpnd = TII->getNamedOperand(MovMI, AMDGPU::OpName::row_mask);
225 auto *BankMaskOpnd = TII->getNamedOperand(MovMI, AMDGPU::OpName::bank_mask);
260 TII->getNamedOperand(MovMI, AMDGPU::OpName::vdst)->getReg()),
290 auto *Src0 = TII->getNamedOperand(MovMI, AMDGPU::OpName::src0);
419 DPPInst.add(*TII->getNamedOperand(MovMI, AMDGPU::OpName::dpp_ctrl));
420 DPPInst.add(*TII->getNamedOperand(MovMI, AMDGPU::OpName::row_mask));
421 DPPInst.add(*TII->getNamedOperand(MovMI, AMDGPU::OpName::bank_mask));
486 MachineInstr &OrigMI, MachineInstr &MovMI, RegSubRegPair CombOldVGPR,
500 auto MovDst = TII->getNamedOperand(MovMI, AMDGPU::OpName::vdst);
507 return createDPPInst(OrigMI, MovMI, CombOldVGPR, CombBCZ, IsShrinkable);
522 bool GCNDPPCombine::combineDPPMov(MachineInstr &MovMI) const {
523 assert(MovMI.getOpcode() == AMDGPU::V_MOV_B32_dpp ||
524 MovMI.getOpcode() == AMDGPU::V_MOV_B64_dpp ||
525 MovMI.getOpcode() == AMDGPU::V_MOV_B64_DPP_PSEUDO);
526 LLVM_DEBUG(dbgs() << "\nDPP combine: " << MovMI);
528 auto *DstOpnd = TII->getNamedOperand(MovMI, AMDGPU::OpName::vdst);
535 if (execMayBeModifiedBeforeAnyUse(*MRI, DPPMovReg, MovMI)) {
541 if (MovMI.getOpcode() == AMDGPU::V_MOV_B64_DPP_PSEUDO ||
542 MovMI.getOpcode() == AMDGPU::V_MOV_B64_dpp) {
543 auto *DppCtrl = TII->getNamedOperand(MovMI, AMDGPU::OpName::dpp_ctrl);
553 auto *RowMaskOpnd = TII->getNamedOperand(MovMI, AMDGPU::OpName::row_mask);
555 auto *BankMaskOpnd = TII->getNamedOperand(MovMI, AMDGPU::OpName::bank_mask);
560 auto *BCZOpnd = TII->getNamedOperand(MovMI, AMDGPU::OpName::bound_ctrl);
564 auto *OldOpnd = TII->getNamedOperand(MovMI, AMDGPU::OpName::old);
565 auto *SrcOpnd = TII->getNamedOperand(MovMI, AMDGPU::OpName::src0);
618 auto UndefInst = BuildMI(*MovMI.getParent(), MovMI, MovMI.getDebugLoc(),
623 OrigMIs.push_back(&MovMI);
706 if (auto *DPPInst = createDPPInst(OrigMI, MovMI, CombOldVGPR,
719 createDPPInst(*NewMI, MovMI, CombOldVGPR, OldOpndValue, CombBCZ,