Lines Matching defs:RegIdx

315   unsigned RegIdx = Imm & 0xff;
317   return addOperand(Inst, DAsm->createVGPR16Operand(RegIdx, IsHi));
326   unsigned RegIdx = Imm & 0x7f;
328   return addOperand(Inst, DAsm->createVGPR16Operand(RegIdx, IsHi));
340     unsigned RegIdx = Imm & 0x7f;
341     return addOperand(Inst, DAsm->createVGPR16Operand(RegIdx, IsHi));
356     unsigned RegIdx = Imm & 0xff;
357     return addOperand(Inst, DAsm->createVGPR16Operand(RegIdx, IsHi));
860       unsigned RegIdx = OpEnc & AMDGPU::HWEncoding::REG_IDX_MASK;
861       Op.setReg(ConversionRC.getRegister(RegIdx * 2 + 1));
1239 MCOperand AMDGPUDisassembler::createVGPR16Operand(unsigned RegIdx,
1241   unsigned RegIdxInVGPR16 = RegIdx * 2 + (IsHi ? 1 : 0);