Lines Matching defs:ImmVal

2059       uint32_t ImmVal = FPLiteral.bitcastToAPInt().getZExtValue();
2060       return isInlineableLiteralOp16(ImmVal, type,
2327       uint64_t ImmVal = FPLiteral.bitcastToAPInt().getZExtValue();
2328       Inst.addOperand(MCOperand::createImm(ImmVal));
6745   int64_t ImmVal = 0;
6747   auto Res = parseIntWithPrefix(Pref, ImmVal);
6751   if (ImmTy == AMDGPUOperand::ImmTyIndexKey16bit && (ImmVal < 0 || ImmVal > 1))
6754   if (ImmTy == AMDGPUOperand::ImmTyIndexKey8bit && (ImmVal < 0 || ImmVal > 3))
6757   Operands.push_back(AMDGPUOperand::CreateImm(this, ImmVal, Loc, ImmTy));
7389   int64_t ImmVal = 0;
7412     ImmVal = HwregEncoding::encode(HwReg.Val, Offset.Val, Width.Val);
7416       parseExpr(ImmVal, "a hwreg macro, structured immediate"))
7422   if (!isUInt<16>(ImmVal))
7425       AMDGPUOperand::CreateImm(this, ImmVal, Loc, AMDGPUOperand::ImmTyHwreg));
7526   int64_t ImmVal = 0;
7535       ImmVal = encodeMsg(Msg.Val, Op.Val, Stream.Val);
7539   } else if (parseExpr(ImmVal, "a sendmsg macro")) {
7540     if (ImmVal < 0 || !isUInt<16>(ImmVal))
7546   Operands.push_back(AMDGPUOperand::CreateImm(this, ImmVal, Loc, AMDGPUOperand::ImmTySendMsg));