Lines Matching defs:DstHi

1583   Register DstHi;
1590     DstHi = IsUnsigned ? B.buildUMulH(S32, Src0, Src1).getReg(0)
1592     MRI.setRegBank(DstHi, AMDGPU::SGPRRegBank);
1600     DstHi = IsUnsigned ? B.buildUMulH(S32, VSrc0, VSrc1).getReg(0)
1602     MRI.setRegBank(DstHi, AMDGPU::VGPRRegBank);
1605       DstHi = buildReadFirstLane(B, MRI, DstHi);
1631     Carry = B.buildICmp(CmpInst::ICMP_SLT, MulHiInVgpr ? S1 : S32, DstHi, Zero)
1645       DstHi = B.buildCopy(S32, DstHi).getReg(0);
1647       MRI.setRegBank(DstHi, AMDGPU::VGPRRegBank);
1670     auto AddHi = B.buildUAdde(S32, CarryType, DstHi, Src2Hi, CarryLo);
1671     DstHi = AddHi.getReg(0);
1672     MRI.setRegBank(DstHi, DstBank);
1690   B.buildMergeLikeInstr(Dst0, {DstLo, DstHi});