Lines Matching defs:Intr

6218                                       const AMDGPU::ImageDimIntrinsicInfo *Intr,
6222   auto EndIdx = Intr->VAddrEnd;
6224   for (unsigned I = Intr->VAddrStart; I < EndIdx; I++) {
6231     if ((I < Intr->GradientStart) ||
6232         (I >= Intr->GradientStart && I < Intr->CoordStart && !IsG16) ||
6233         (I >= Intr->CoordStart && !IsA16)) {
6234       if ((I < Intr->GradientStart) && IsA16 &&
6236         assert(I == Intr->BiasIndex && "Got unexpected 16-bit extra argument");
6243         assert((!IsA16 || Intr->NumBiasArgs == 0 || I != Intr->BiasIndex) &&
6253           ((Intr->NumGradients / 2) % 2 == 1 &&
6254            (I == static_cast<unsigned>(Intr->GradientStart +
6255                                        (Intr->NumGradients / 2) - 1) ||
6256             I == static_cast<unsigned>(Intr->GradientStart +
6257                                        Intr->NumGradients - 1))) ||
6318     const AMDGPU::ImageDimIntrinsicInfo *Intr) const {
6329       AMDGPU::getMIMGBaseOpcodeInfo(Intr->BaseOpcode);
6351       MRI->getType(MI.getOperand(ArgOffset + Intr->GradientStart).getReg());
6353       MRI->getType(MI.getOperand(ArgOffset + Intr->CoordStart).getReg());
6361     DMask = MI.getOperand(ArgOffset + Intr->DMaskIndex).getImm();
6395     MI.getOperand(ArgOffset + Intr->DMaskIndex).setImm(DMask);
6416   unsigned CorrectedNumVAddrs = Intr->NumVAddrs;
6438     packImage16bitOpsToDwords(B, MI, PackedRegs, ArgOffset, Intr, IsA16, IsG16);
6463     for (unsigned I = Intr->VAddrStart; I < Intr->VAddrEnd; I++) {
6472       if (I - Intr->VAddrStart < NumPacked)
6473         SrcOp.setReg(PackedRegs[I - Intr->VAddrStart]);
6500                                ArgOffset + Intr->VAddrStart + NSAMaxSize - 1,
6501                                Intr->NumVAddrs - NSAMaxSize + 1);
6502     } else if (!UseNSA && Intr->NumVAddrs > 1) {
6503       convertImageAddrToPacked(B, MI, ArgOffset + Intr->VAddrStart,
6504                                Intr->NumVAddrs);