Lines Matching defs:Is64

277 static unsigned getLogicalBitOpcode(unsigned Opc, bool Is64) {
280     return Is64 ? AMDGPU::S_AND_B64 : AMDGPU::S_AND_B32;
282     return Is64 ? AMDGPU::S_OR_B64 : AMDGPU::S_OR_B32;
284     return Is64 ? AMDGPU::S_XOR_B64 : AMDGPU::S_XOR_B32;
299   bool Is64 = Size > 32 || (DstRB->getID() == AMDGPU::VCCRegBankID &&
301   I.setDesc(TII.get(getLogicalBitOpcode(I.getOpcode(), Is64)));
1406   const bool Is64 = Size == 64;
1411   if (Size != STI.getWavefrontSize() && (!Is64 || !IsWave32))
1437       unsigned Opcode = Is64 ? AMDGPU::S_MOV_B64 : AMDGPU::S_MOV_B32;
1975       const bool Is64 = MRI->getType(VDataOut).getSizeInBits() == 64;
1978         Is64 ? &AMDGPU::VReg_128RegClass : &AMDGPU::VReg_64RegClass);
1979       unsigned SubReg = Is64 ? AMDGPU::sub0_sub1 : AMDGPU::sub0;
2854       const bool Is64 = STI.isWave64();
2855       const unsigned Opcode = Is64 ? AMDGPU::S_AND_B64 : AMDGPU::S_AND_B32;
2856       const Register Exec = Is64 ? AMDGPU::EXEC : AMDGPU::EXEC_LO;
3066   const bool Is64 = DstTy.getSizeInBits() == 64;
3073     if (DstTy.getSizeInBits() != 32 && !Is64)
3079     unsigned Opc = Is64 ? AMDGPU::S_MOVRELS_B64 : AMDGPU::S_MOVRELS_B32;