Lines Matching defs:DstRB

294   const RegisterBank *DstRB = RBI.getRegBank(DstReg, *MRI, TRI);
295 if (DstRB->getID() != AMDGPU::SGPRRegBankID &&
296 DstRB->getID() != AMDGPU::VCCRegBankID)
299 bool Is64 = Size > 32 || (DstRB->getID() == AMDGPU::VCCRegBankID &&
321 const RegisterBank *DstRB = RBI.getRegBank(DstReg, *MRI, TRI);
322 const bool IsSALU = DstRB->getID() == AMDGPU::SGPRRegBankID;
1478 const RegisterBank *DstRB = RBI.getRegBank(DstReg, *MRI, TRI);
1479 unsigned Mov = DstRB->getID() == AMDGPU::SGPRRegBankID ?
2201 const RegisterBank *DstRB;
2205 DstRB = SrcRB;
2207 DstRB = RBI.getRegBank(DstReg, *MRI, TRI);
2208 if (SrcRB != DstRB)
2212 const bool IsVALU = DstRB->getID() == AMDGPU::VGPRRegBankID;
2220 TRI.getRegClassForSizeOnBank(DstSize, *DstRB);
2506 const RegisterBank *DstRB = RBI.getRegBank(Dst, *MRI, TRI);
2507 if (DstRB->getID() != AMDGPU::SGPRRegBankID)
2544 const RegisterBank *DstRB = RBI.getRegBank(DstReg, *MRI, TRI);
2545 const bool IsSgpr = DstRB->getID() == AMDGPU::SGPRRegBankID;
2548 if (DstRB->getID() == AMDGPU::VCCRegBankID) {
2622 const RegisterBank *DstRB = RBI.getRegBank(Dst, *MRI, TRI);
2623 if (DstRB->getID() != AMDGPU::SGPRRegBankID ||
2668 const RegisterBank *DstRB = RBI.getRegBank(Dst, *MRI, TRI);
2669 if (DstRB->getID() != AMDGPU::SGPRRegBankID ||
2886 const RegisterBank *DstRB = RBI.getRegBank(DstReg, *MRI, TRI);
2887 const bool IsVGPR = DstRB->getID() == AMDGPU::VGPRRegBankID;
2905 const RegisterBank *DstRB = RBI.getRegBank(DstReg, *MRI, TRI);
2908 const bool IsVGPR = DstRB->getID() == AMDGPU::VGPRRegBankID;
2909 if (DstRB != SrcRB) // Should only happen for hand written MIR.
2935 const TargetRegisterClass *DstRC = TRI.getRegClassForTypeOnBank(Ty, *DstRB);
3044 const RegisterBank *DstRB = RBI.getRegBank(DstReg, *MRI, TRI);
3056 TRI.getRegClassForTypeOnBank(DstTy, *DstRB);
3449 const RegisterBank *DstRB = RBI.getRegBank(DstReg, *MRI, TRI);
3450 const bool IsVALU = DstRB->getID() == AMDGPU::VGPRRegBankID;