Lines Matching defs:SL
923 SDLoc SL(Op);
928 return DAG.getNode(AMDGPUISD::RCP, SL, VT, NegSrc, Op->getFlags());
1510 SDLoc SL(Op);
1522 SDValue NewIn = DAG.getNode(ISD::BITCAST, SL, NewEltVT, In);
1531 SDValue BV = DAG.getBuildVector(NewVT, SL, Args);
1532 return DAG.getNode(ISD::BITCAST, SL, VT, BV);
1539 return DAG.getBuildVector(Op.getValueType(), SL, Args);
1544 SDLoc SL(Op);
1560 SDValue Tmp = DAG.getNode(ISD::BITCAST, SL, NewSrcVT, Op.getOperand(0));
1566 Tmp = DAG.getBuildVector(NewVT, SL, Args);
1568 return DAG.getNode(ISD::BITCAST, SL, VT, Tmp);
1574 return DAG.getBuildVector(Op.getValueType(), SL, Args);
1704 SDLoc SL(Op);
1706 SDValue Vec = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Op);
1708 const SDValue Zero = DAG.getConstant(0, SL, MVT::i32);
1709 const SDValue One = DAG.getConstant(1, SL, MVT::i32);
1711 SDValue Lo = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, Vec, Zero);
1712 SDValue Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, Vec, One);
1718 SDLoc SL(Op);
1720 SDValue Vec = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Op);
1721 const SDValue Zero = DAG.getConstant(0, SL, MVT::i32);
1722 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, Vec, Zero);
1726 SDLoc SL(Op);
1728 SDValue Vec = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Op);
1729 const SDValue One = DAG.getConstant(1, SL, MVT::i32);
1730 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, Vec, One);
1771 SDLoc SL(Op);
1779 return DAG.getMergeValues(Ops, SL);
1793 std::tie(Lo, Hi) = splitVector(Op, SL, LoVT, HiVT, DAG);
1799 SDValue LoLoad = DAG.getExtLoad(Load->getExtensionType(), SL, LoVT,
1802 SDValue HiPtr = DAG.getObjectPtrOffset(SL, BasePtr, TypeSize::getFixed(Size));
1804 DAG.getExtLoad(Load->getExtensionType(), SL, HiVT, Load->getChain(),
1811 Join = DAG.getNode(ISD::CONCAT_VECTORS, SL, VT, LoLoad, HiLoad);
1813 Join = DAG.getNode(ISD::INSERT_SUBVECTOR, SL, VT, DAG.getUNDEF(VT), LoLoad,
1814 DAG.getVectorIdxConstant(0, SL));
1816 HiVT.isVector() ? ISD::INSERT_SUBVECTOR : ISD::INSERT_VECTOR_ELT, SL,
1818 DAG.getVectorIdxConstant(LoVT.getVectorNumElements(), SL));
1821 SDValue Ops[] = {Join, DAG.getNode(ISD::TokenFactor, SL, MVT::Other,
1824 return DAG.getMergeValues(Ops, SL);
1833 SDLoc SL(Op);
1852 Load->getExtensionType(), SL, WideVT, Load->getChain(), BasePtr, SrcValue,
1855 {DAG.getNode(ISD::EXTRACT_SUBVECTOR, SL, VT, WideLoad,
1856 DAG.getVectorIdxConstant(0, SL)),
1858 SL);
1875 SDLoc SL(Op);
1883 std::tie(Lo, Hi) = splitVector(Val, SL, LoVT, HiVT, DAG);
1885 SDValue HiPtr = DAG.getObjectPtrOffset(SL, BasePtr, LoMemVT.getStoreSize());
1893 DAG.getTruncStore(Chain, SL, Lo, BasePtr, SrcValue, LoMemVT, BaseAlign,
1896 DAG.getTruncStore(Chain, SL, Hi, HiPtr, SrcValue.getWithOffset(Size),
1899 return DAG.getNode(ISD::TokenFactor, SL, MVT::Other, LoStore, HiStore);
2351 SDLoc SL(Op);
2357 SDValue Div = DAG.getNode(ISD::FDIV, SL, VT, X, Y, Flags);
2358 SDValue Trunc = DAG.getNode(ISD::FTRUNC, SL, VT, Div, Flags);
2359 SDValue Neg = DAG.getNode(ISD::FNEG, SL, VT, Trunc, Flags);
2361 return DAG.getNode(ISD::FMA, SL, VT, Neg, Y, X, Flags);
2365 SDLoc SL(Op);
2372 SDValue Trunc = DAG.getNode(ISD::FTRUNC, SL, MVT::f64, Src);
2374 const SDValue Zero = DAG.getConstantFP(0.0, SL, MVT::f64);
2375 const SDValue One = DAG.getConstantFP(1.0, SL, MVT::f64);
2380 SDValue Lt0 = DAG.getSetCC(SL, SetCCVT, Src, Zero, ISD::SETOGT);
2381 SDValue NeTrunc = DAG.getSetCC(SL, SetCCVT, Src, Trunc, ISD::SETONE);
2382 SDValue And = DAG.getNode(ISD::AND, SL, SetCCVT, Lt0, NeTrunc);
2384 SDValue Add = DAG.getNode(ISD::SELECT, SL, MVT::f64, And, One, Zero);
2386 return DAG.getNode(ISD::FADD, SL, MVT::f64, Trunc, Add);
2389 static SDValue extractF64Exponent(SDValue Hi, const SDLoc &SL,
2394 SDValue ExpPart = DAG.getNode(AMDGPUISD::BFE_U32, SL, MVT::i32,
2396 DAG.getConstant(FractBits - 32, SL, MVT::i32),
2397 DAG.getConstant(ExpBits, SL, MVT::i32));
2398 SDValue Exp = DAG.getNode(ISD::SUB, SL, MVT::i32, ExpPart,
2399 DAG.getConstant(1023, SL, MVT::i32));
2405 SDLoc SL(Op);
2410 const SDValue Zero = DAG.getConstant(0, SL, MVT::i32);
2416 SDValue Exp = extractF64Exponent(Hi, SL, DAG);
2421 const SDValue SignBitMask = DAG.getConstant(UINT32_C(1) << 31, SL, MVT::i32);
2422 SDValue SignBit = DAG.getNode(ISD::AND, SL, MVT::i32, Hi, SignBitMask);
2425 SDValue SignBit64 = DAG.getBuildVector(MVT::v2i32, SL, {Zero, SignBit});
2426 SignBit64 = DAG.getNode(ISD::BITCAST, SL, MVT::i64, SignBit64);
2428 SDValue BcInt = DAG.getNode(ISD::BITCAST, SL, MVT::i64, Src);
2430 = DAG.getConstant((UINT64_C(1) << FractBits) - 1, SL, MVT::i64);
2432 SDValue Shr = DAG.getNode(ISD::SRA, SL, MVT::i64, FractMask, Exp);
2433 SDValue Not = DAG.getNOT(SL, Shr, MVT::i64);
2434 SDValue Tmp0 = DAG.getNode(ISD::AND, SL, MVT::i64, BcInt, Not);
2439 const SDValue FiftyOne = DAG.getConstant(FractBits - 1, SL, MVT::i32);
2441 SDValue ExpLt0 = DAG.getSetCC(SL, SetCCVT, Exp, Zero, ISD::SETLT);
2442 SDValue ExpGt51 = DAG.getSetCC(SL, SetCCVT, Exp, FiftyOne, ISD::SETGT);
2444 SDValue Tmp1 = DAG.getNode(ISD::SELECT, SL, MVT::i64, ExpLt0, SignBit64, Tmp0);
2445 SDValue Tmp2 = DAG.getNode(ISD::SELECT, SL, MVT::i64, ExpGt51, BcInt, Tmp1);
2447 return DAG.getNode(ISD::BITCAST, SL, MVT::f64, Tmp2);
2452 SDLoc SL(Op);
2458 SDValue C1 = DAG.getConstantFP(C1Val, SL, MVT::f64);
2459 SDValue CopySign = DAG.getNode(ISD::FCOPYSIGN, SL, MVT::f64, C1, Src);
2463 SDValue Tmp1 = DAG.getNode(ISD::FADD, SL, MVT::f64, Src, CopySign);
2464 SDValue Tmp2 = DAG.getNode(ISD::FSUB, SL, MVT::f64, Tmp1, CopySign);
2466 SDValue Fabs = DAG.getNode(ISD::FABS, SL, MVT::f64, Src);
2469 SDValue C2 = DAG.getConstantFP(C2Val, SL, MVT::f64);
2473 SDValue Cond = DAG.getSetCC(SL, SetCCVT, Fabs, C2, ISD::SETOGT);
2475 return DAG.getSelect(SL, MVT::f64, Cond, Src, Tmp2);
2499 SDLoc SL(Op);
2503 SDValue T = DAG.getNode(ISD::FTRUNC, SL, VT, X);
2507 SDValue Diff = DAG.getNode(ISD::FSUB, SL, VT, X, T);
2509 SDValue AbsDiff = DAG.getNode(ISD::FABS, SL, VT, Diff);
2511 const SDValue Zero = DAG.getConstantFP(0.0, SL, VT);
2512 const SDValue One = DAG.getConstantFP(1.0, SL, VT);
2517 const SDValue Half = DAG.getConstantFP(0.5, SL, VT);
2518 SDValue Cmp = DAG.getSetCC(SL, SetCCVT, AbsDiff, Half, ISD::SETOGE);
2519 SDValue OneOrZeroFP = DAG.getNode(ISD::SELECT, SL, VT, Cmp, One, Zero);
2521 SDValue SignedOffset = DAG.getNode(ISD::FCOPYSIGN, SL, VT, OneOrZeroFP, X);
2522 return DAG.getNode(ISD::FADD, SL, VT, T, SignedOffset);
2526 SDLoc SL(Op);
2533 SDValue Trunc = DAG.getNode(ISD::FTRUNC, SL, MVT::f64, Src);
2535 const SDValue Zero = DAG.getConstantFP(0.0, SL, MVT::f64);
2536 const SDValue NegOne = DAG.getConstantFP(-1.0, SL, MVT::f64);
2541 SDValue Lt0 = DAG.getSetCC(SL, SetCCVT, Src, Zero, ISD::SETOLT);
2542 SDValue NeTrunc = DAG.getSetCC(SL, SetCCVT, Src, Trunc, ISD::SETONE);
2543 SDValue And = DAG.getNode(ISD::AND, SL, SetCCVT, Lt0, NeTrunc);
2545 SDValue Add = DAG.getNode(ISD::SELECT, SL, MVT::f64, And, NegOne, Zero);
2547 return DAG.getNode(ISD::FADD, SL, MVT::f64, Trunc, Add);
2594 SDLoc SL(Src);
2598 DAG.getConstantFP(APFloat::getSmallestNormalized(Semantics), SL, VT);
2603 SL, getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT), Src,
2611 SDLoc SL(Src);
2614 SDValue Inf = DAG.getConstantFP(APFloat::getInf(Semantics), SL, VT);
2616 SDValue Fabs = DAG.getNode(ISD::FABS, SL, VT, Src, Flags);
2618 SL, getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT), Fabs,
2626 AMDGPUTargetLowering::getScaledLogInput(SelectionDAG &DAG, const SDLoc SL,
2634 DAG.getConstantFP(APFloat::getSmallestNormalized(Semantics), SL, VT);
2637 SL, getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT), Src,
2640 SDValue Scale32 = DAG.getConstantFP(0x1.0p+32, SL, VT);
2641 SDValue One = DAG.getConstantFP(1.0, SL, VT);
2643 DAG.getNode(ISD::SELECT, SL, VT, IsLtSmallestNormal, Scale32, One, Flags);
2645 SDValue ScaledInput = DAG.getNode(ISD::FMUL, SL, VT, Src, ScaleFactor, Flags);
2656 SDLoc SL(Op);
2664 SDValue Ext = DAG.getNode(ISD::FP_EXTEND, SL, MVT::f32, Src, Flags);
2665 SDValue Log = DAG.getNode(AMDGPUISD::LOG, SL, MVT::f32, Ext, Flags);
2666 return DAG.getNode(ISD::FP_ROUND, SL, VT, Log,
2667 DAG.getTargetConstant(0, SL, MVT::i32), Flags);
2671 getScaledLogInput(DAG, SL, Src, Flags);
2673 return DAG.getNode(AMDGPUISD::LOG, SL, VT, Src, Flags);
2675 SDValue Log2 = DAG.getNode(AMDGPUISD::LOG, SL, VT, ScaledInput, Flags);
2677 SDValue ThirtyTwo = DAG.getConstantFP(32.0, SL, VT);
2678 SDValue Zero = DAG.getConstantFP(0.0, SL, VT);
2680 DAG.getNode(ISD::SELECT, SL, VT, IsLtSmallestNormal, ThirtyTwo, Zero);
2681 return DAG.getNode(ISD::FSUB, SL, VT, Log2, ResultOffset, Flags);
2684 static SDValue getMad(SelectionDAG &DAG, const SDLoc &SL, EVT VT, SDValue X,
2686 SDValue Mul = DAG.getNode(ISD::FMUL, SL, VT, X, Y, Flags);
2687 return DAG.getNode(ISD::FADD, SL, VT, Mul, C, Flags);
2793 SDValue AMDGPUTargetLowering::LowerFLOGUnsafe(SDValue Src, const SDLoc &SL,
2804 auto [ScaledInput, IsScaled] = getScaledLogInput(DAG, SL, Src, Flags);
2806 SDValue LogSrc = DAG.getNode(AMDGPUISD::LOG, SL, VT, ScaledInput, Flags);
2808 DAG.getConstantFP(-32.0 * Log2BaseInverted, SL, VT);
2810 SDValue Zero = DAG.getConstantFP(0.0f, SL, VT);
2812 SDValue ResultOffset = DAG.getNode(ISD::SELECT, SL, VT, IsScaled,
2815 SDValue Log2Inv = DAG.getConstantFP(Log2BaseInverted, SL, VT);
2818 return DAG.getNode(ISD::FMA, SL, VT, LogSrc, Log2Inv, ResultOffset,
2820 SDValue Mul = DAG.getNode(ISD::FMUL, SL, VT, LogSrc, Log2Inv, Flags);
2821 return DAG.getNode(ISD::FADD, SL, VT, Mul, ResultOffset);
2825 SDValue Log2Operand = DAG.getNode(LogOp, SL, VT, Src, Flags);
2826 SDValue Log2BaseInvertedOperand = DAG.getConstantFP(Log2BaseInverted, SL, VT);
2828 return DAG.getNode(ISD::FMUL, SL, VT, Log2Operand, Log2BaseInvertedOperand,
2836 SDLoc SL(Op);
2844 SDValue Ext = DAG.getNode(ISD::FP_EXTEND, SL, MVT::f32, Src, Flags);
2845 SDValue Log = DAG.getNode(AMDGPUISD::EXP, SL, MVT::f32, Ext, Flags);
2846 return DAG.getNode(ISD::FP_ROUND, SL, VT, Log,
2847 DAG.getTargetConstant(0, SL, MVT::i32), Flags);
2853 return DAG.getNode(AMDGPUISD::EXP, SL, MVT::f32, Src, Flags);
2859 SDValue RangeCheckConst = DAG.getConstantFP(-0x1.f80000p+6f, SL, VT);
2864 DAG.getSetCC(SL, SetCCVT, Src, RangeCheckConst, ISD::SETOLT);
2866 SDValue SixtyFour = DAG.getConstantFP(0x1.0p+6f, SL, VT);
2867 SDValue Zero = DAG.getConstantFP(0.0, SL, VT);
2870 DAG.getNode(ISD::SELECT, SL, VT, NeedsScaling, SixtyFour, Zero);
2872 SDValue AddInput = DAG.getNode(ISD::FADD, SL, VT, Src, AddOffset, Flags);
2873 SDValue Exp2 = DAG.getNode(AMDGPUISD::EXP, SL, VT, AddInput, Flags);
2875 SDValue TwoExpNeg64 = DAG.getConstantFP(0x1.0p-64f, SL, VT);
2876 SDValue One = DAG.getConstantFP(1.0, SL, VT);
2878 DAG.getNode(ISD::SELECT, SL, VT, NeedsScaling, TwoExpNeg64, One);
2880 return DAG.getNode(ISD::FMUL, SL, VT, Exp2, ResultScale, Flags);
2883 SDValue AMDGPUTargetLowering::lowerFEXPUnsafe(SDValue X, const SDLoc &SL,
2887 const SDValue Log2E = DAG.getConstantFP(numbers::log2e, SL, VT);
2891 SDValue Mul = DAG.getNode(ISD::FMUL, SL, VT, X, Log2E, Flags);
2894 SL, VT, Mul, Flags);
2899 SDValue Threshold = DAG.getConstantFP(-0x1.5d58a0p+6f, SL, VT);
2900 SDValue NeedsScaling = DAG.getSetCC(SL, SetCCVT, X, Threshold, ISD::SETOLT);
2902 SDValue ScaleOffset = DAG.getConstantFP(0x1.0p+6f, SL, VT);
2904 SDValue ScaledX = DAG.getNode(ISD::FADD, SL, VT, X, ScaleOffset, Flags);
2907 DAG.getNode(ISD::SELECT, SL, VT, NeedsScaling, ScaledX, X);
2909 SDValue ExpInput = DAG.getNode(ISD::FMUL, SL, VT, AdjustedX, Log2E, Flags);
2911 SDValue Exp2 = DAG.getNode(AMDGPUISD::EXP, SL, VT, ExpInput, Flags);
2913 SDValue ResultScaleFactor = DAG.getConstantFP(0x1.969d48p-93f, SL, VT);
2915 DAG.getNode(ISD::FMUL, SL, VT, Exp2, ResultScaleFactor, Flags);
2917 return DAG.getNode(ISD::SELECT, SL, VT, NeedsScaling, AdjustedResult, Exp2,
2923 SDValue AMDGPUTargetLowering::lowerFEXP10Unsafe(SDValue X, const SDLoc &SL,
2931 SDValue K0 = DAG.getConstantFP(0x1.a92000p+1f, SL, VT);
2932 SDValue K1 = DAG.getConstantFP(0x1.4f0978p-11f, SL, VT);
2934 SDValue Mul0 = DAG.getNode(ISD::FMUL, SL, VT, X, K0, Flags);
2935 SDValue Exp2_0 = DAG.getNode(Exp2Op, SL, VT, Mul0, Flags);
2936 SDValue Mul1 = DAG.getNode(ISD::FMUL, SL, VT, X, K1, Flags);
2937 SDValue Exp2_1 = DAG.getNode(Exp2Op, SL, VT, Mul1, Flags);
2938 return DAG.getNode(ISD::FMUL, SL, VT, Exp2_0, Exp2_1);
2949 SDValue Threshold = DAG.getConstantFP(-0x1.2f7030p+5f, SL, VT);
2950 SDValue NeedsScaling = DAG.getSetCC(SL, SetCCVT, X, Threshold, ISD::SETOLT);
2952 SDValue ScaleOffset = DAG.getConstantFP(0x1.0p+5f, SL, VT);
2953 SDValue ScaledX = DAG.getNode(ISD::FADD, SL, VT, X, ScaleOffset, Flags);
2955 DAG.getNode(ISD::SELECT, SL, VT, NeedsScaling, ScaledX, X);
2957 SDValue K0 = DAG.getConstantFP(0x1.a92000p+1f, SL, VT);
2958 SDValue K1 = DAG.getConstantFP(0x1.4f0978p-11f, SL, VT);
2960 SDValue Mul0 = DAG.getNode(ISD::FMUL, SL, VT, AdjustedX, K0, Flags);
2961 SDValue Exp2_0 = DAG.getNode(Exp2Op, SL, VT, Mul0, Flags);
2962 SDValue Mul1 = DAG.getNode(ISD::FMUL, SL, VT, AdjustedX, K1, Flags);
2963 SDValue Exp2_1 = DAG.getNode(Exp2Op, SL, VT, Mul1, Flags);
2965 SDValue MulExps = DAG.getNode(ISD::FMUL, SL, VT, Exp2_0, Exp2_1, Flags);
2967 SDValue ResultScaleFactor = DAG.getConstantFP(0x1.9f623ep-107f, SL, VT);
2969 DAG.getNode(ISD::FMUL, SL, VT, MulExps, ResultScaleFactor, Flags);
2971 return DAG.getNode(ISD::SELECT, SL, VT, NeedsScaling, AdjustedResult, MulExps,
2977 SDLoc SL(Op);
2985 return lowerFEXPUnsafe(X, SL, DAG, Flags);
2994 SDValue Ext = DAG.getNode(ISD::FP_EXTEND, SL, MVT::f32, X, Flags);
2995 SDValue Lowered = lowerFEXPUnsafe(Ext, SL, DAG, Flags);
2996 return DAG.getNode(ISD::FP_ROUND, SL, VT, Lowered,
2997 DAG.getTargetConstant(0, SL, MVT::i32), Flags);
3005 return IsExp10 ? lowerFEXP10Unsafe(X, SL, DAG, Flags)
3006 : lowerFEXPUnsafe(X, SL, DAG, Flags);
3043 SDValue C = DAG.getConstantFP(IsExp10 ? c_exp10 : c_exp, SL, VT);
3044 SDValue CC = DAG.getConstantFP(IsExp10 ? cc_exp10 : cc_exp, SL, VT);
3046 PH = DAG.getNode(ISD::FMUL, SL, VT, X, C, Flags);
3047 SDValue NegPH = DAG.getNode(ISD::FNEG, SL, VT, PH, Flags);
3048 SDValue FMA0 = DAG.getNode(ISD::FMA, SL, VT, X, C, NegPH, Flags);
3049 PL = DAG.getNode(ISD::FMA, SL, VT, X, CC, FMA0, Flags);
3057 SDValue CH = DAG.getConstantFP(IsExp10 ? ch_exp10 : ch_exp, SL, VT);
3058 SDValue CL = DAG.getConstantFP(IsExp10 ? cl_exp10 : cl_exp, SL, VT);
3060 SDValue XAsInt = DAG.getNode(ISD::BITCAST, SL, MVT::i32, X);
3061 SDValue MaskConst = DAG.getConstant(0xfffff000, SL, MVT::i32);
3062 SDValue XHAsInt = DAG.getNode(ISD::AND, SL, MVT::i32, XAsInt, MaskConst);
3063 SDValue XH = DAG.getNode(ISD::BITCAST, SL, VT, XHAsInt);
3064 SDValue XL = DAG.getNode(ISD::FSUB, SL, VT, X, XH, Flags);
3066 PH = DAG.getNode(ISD::FMUL, SL, VT, XH, CH, Flags);
3068 SDValue XLCL = DAG.getNode(ISD::FMUL, SL, VT, XL, CL, Flags);
3069 SDValue Mad0 = getMad(DAG, SL, VT, XL, CH, XLCL, Flags);
3070 PL = getMad(DAG, SL, VT, XH, CL, Mad0, Flags);
3073 SDValue E = DAG.getNode(ISD::FROUNDEVEN, SL, VT, PH, Flags);
3076 SDValue PHSubE = DAG.getNode(ISD::FSUB, SL, VT, PH, E, FlagsNoContract);
3078 SDValue A = DAG.getNode(ISD::FADD, SL, VT, PHSubE, PL, Flags);
3079 SDValue IntE = DAG.getNode(ISD::FP_TO_SINT, SL, MVT::i32, E);
3080 SDValue Exp2 = DAG.getNode(AMDGPUISD::EXP, SL, VT, A, Flags);
3082 SDValue R = DAG.getNode(ISD::FLDEXP, SL, VT, Exp2, IntE, Flags);
3085 DAG.getConstantFP(IsExp10 ? -0x1.66d3e8p+5f : -0x1.9d1da0p+6f, SL, VT);
3088 SDValue Zero = DAG.getConstantFP(0.0, SL, VT);
3090 DAG.getSetCC(SL, SetCCVT, X, UnderflowCheckConst, ISD::SETOLT);
3092 R = DAG.getNode(ISD::SELECT, SL, VT, Underflow, Zero, R);
3097 DAG.getConstantFP(IsExp10 ? 0x1.344136p+5f : 0x1.62e430p+6f, SL, VT);
3099 DAG.getSetCC(SL, SetCCVT, X, OverflowCheckConst, ISD::SETOGT);
3101 DAG.getConstantFP(APFloat::getInf(APFloat::IEEEsingle()), SL, VT);
3102 R = DAG.getNode(ISD::SELECT, SL, VT, Overflow, Inf, R);
3118 auto SL = SDLoc(Op);
3130 SDValue NumExtBits = DAG.getConstant(32u - NumBits, SL, MVT::i32);
3134 NewOp = DAG.getNode(ISD::ANY_EXTEND, SL, MVT::i32, Arg);
3135 NewOp = DAG.getNode(ISD::SHL, SL, MVT::i32, NewOp, NumExtBits);
3136 NewOp = DAG.getNode(Opc, SL, MVT::i32, NewOp);
3138 NewOp = DAG.getNode(ISD::ZERO_EXTEND, SL, MVT::i32, Arg);
3139 NewOp = DAG.getNode(Opc, SL, MVT::i32, NewOp);
3140 NewOp = DAG.getNode(ISD::SUB, SL, MVT::i32, NewOp, NumExtBits);
3143 return DAG.getNode(ISD::TRUNCATE, SL, ResultVT, NewOp);
3147 SDLoc SL(Op);
3169 SDValue NewOpr = DAG.getNode(NewOpc, SL, MVT::i32, Src);
3172 Op.getValueType().getScalarSizeInBits(), SL, MVT::i32);
3173 NewOpr = DAG.getNode(ISD::UMIN, SL, MVT::i32, NewOpr, ConstVal);
3175 return DAG.getNode(ISD::ZERO_EXTEND, SL, Src.getValueType(), NewOpr);
3181 SDValue OprLo = DAG.getNode(NewOpc, SL, MVT::i32, Lo);
3182 SDValue OprHi = DAG.getNode(NewOpc, SL, MVT::i32, Hi);
3190 const SDValue Const32 = DAG.getConstant(32, SL, MVT::i32);
3192 OprLo = DAG.getNode(AddOpc, SL, MVT::i32, OprLo, Const32);
3194 OprHi = DAG.getNode(AddOpc, SL, MVT::i32, OprHi, Const32);
3197 NewOpr = DAG.getNode(ISD::UMIN, SL, MVT::i32, OprLo, OprHi);
3199 const SDValue Const64 = DAG.getConstant(64, SL, MVT::i32);
3200 NewOpr = DAG.getNode(ISD::UMIN, SL, MVT::i32, NewOpr, Const64);
3203 return DAG.getNode(ISD::ZERO_EXTEND, SL, MVT::i64, NewOpr);
3234 SDLoc SL(Op);
3264 ISD::SRA, SL, MVT::i32, DAG.getNode(ISD::XOR, SL, MVT::i32, Lo, Hi),
3265 DAG.getConstant(31, SL, MVT::i32));
3267 DAG.getNode(ISD::ADD, SL, MVT::i32, DAG.getConstant(32, SL, MVT::i32),
3270 ShAmt = DAG.getNode(AMDGPUISD::FFBH_I32, SL, MVT::i32, Hi);
3273 ShAmt = DAG.getNode(ISD::SUB, SL, MVT::i32, ShAmt,
3274 DAG.getConstant(1, SL, MVT::i32));
3275 ShAmt = DAG.getNode(ISD::UMIN, SL, MVT::i32, ShAmt, MaxShAmt);
3280 Sign = DAG.getNode(ISD::SRA, SL, MVT::i64, Src,
3281 DAG.getConstant(63, SL, MVT::i64));
3283 DAG.getNode(ISD::XOR, SL, MVT::i64,
3284 DAG.getNode(ISD::ADD, SL, MVT::i64, Src, Sign), Sign);
3288 ShAmt = DAG.getNode(ISD::CTLZ, SL, MVT::i32, Hi);
3292 SDValue Norm = DAG.getNode(ISD::SHL, SL, MVT::i64, Src, ShAmt);
3297 SDValue Adjust = DAG.getNode(ISD::UMIN, SL, MVT::i32,
3298 DAG.getConstant(1, SL, MVT::i32), Lo);
3300 Norm = DAG.getNode(ISD::OR, SL, MVT::i32, Hi, Adjust);
3304 SDValue FVal = DAG.getNode(Opc, SL, MVT::f32, Norm);
3308 ShAmt = DAG.getNode(ISD::SUB, SL, MVT::i32, DAG.getConstant(32, SL, MVT::i32),
3312 return DAG.getNode(ISD::FLDEXP, SL, MVT::f32, FVal, ShAmt);
3317 SDValue Exp = DAG.getNode(ISD::SHL, SL, MVT::i32, ShAmt,
3318 DAG.getConstant(23, SL, MVT::i32));
3320 DAG.getNode(ISD::ADD, SL, MVT::i32,
3321 DAG.getNode(ISD::BITCAST, SL, MVT::i32, FVal), Exp);
3324 Sign = DAG.getNode(ISD::SHL, SL, MVT::i32,
3325 DAG.getNode(ISD::TRUNCATE, SL, MVT::i32, Sign),
3326 DAG.getConstant(31, SL, MVT::i32));
3327 IVal = DAG.getNode(ISD::OR, SL, MVT::i32, IVal, Sign);
3329 return DAG.getNode(ISD::BITCAST, SL, MVT::f32, IVal);
3334 SDLoc SL(Op);
3341 SL, MVT::f64, Hi);
3343 SDValue CvtLo = DAG.getNode(ISD::UINT_TO_FP, SL, MVT::f64, Lo);
3345 SDValue LdExp = DAG.getNode(ISD::FLDEXP, SL, MVT::f64, CvtHi,
3346 DAG.getConstant(32, SL, MVT::i32));
3348 return DAG.getNode(ISD::FADD, SL, MVT::f64, LdExp, CvtLo);
3369 SDLoc SL(Op);
3370 SDValue ToF32 = DAG.getNode(ISD::UINT_TO_FP, SL, MVT::f32, Src);
3371 SDValue FPRoundFlag = DAG.getIntPtrConstant(0, SL, /*isTarget=*/true);
3372 return DAG.getNode(ISD::FP_ROUND, SL, MVT::bf16, ToF32, FPRoundFlag);
3415 SDLoc SL(Op);
3416 SDValue ToF32 = DAG.getNode(ISD::SINT_TO_FP, SL, MVT::f32, Src);
3417 SDValue FPRoundFlag = DAG.getIntPtrConstant(0, SL, /*isTarget=*/true);
3418 return DAG.getNode(ISD::FP_ROUND, SL, MVT::bf16, ToF32, FPRoundFlag);
3448 SDLoc SL(Op);
3464 SDValue Trunc = DAG.getNode(ISD::FTRUNC, SL, SrcVT, Src);
3472 Sign = DAG.getNode(ISD::SRA, SL, MVT::i32,
3473 DAG.getNode(ISD::BITCAST, SL, MVT::i32, Trunc),
3474 DAG.getConstant(31, SL, MVT::i32));
3475 Trunc = DAG.getNode(ISD::FABS, SL, SrcVT, Trunc);
3481 llvm::bit_cast<double>(UINT64_C(/*2^-32*/ 0x3df0000000000000)), SL,
3484 llvm::bit_cast<double>(UINT64_C(/*-2^32*/ 0xc1f0000000000000)), SL,
3488 llvm::bit_cast<float>(UINT32_C(/*2^-32*/ 0x2f800000)), SL, SrcVT);
3490 llvm::bit_cast<float>(UINT32_C(/*-2^32*/ 0xcf800000)), SL, SrcVT);
3493 SDValue Mul = DAG.getNode(ISD::FMUL, SL, SrcVT, Trunc, K0);
3495 SDValue FloorMul = DAG.getNode(ISD::FFLOOR, SL, SrcVT, Mul);
3497 SDValue Fma = DAG.getNode(ISD::FMA, SL, SrcVT, FloorMul, K1, Trunc);
3501 SL, MVT::i32, FloorMul);
3502 SDValue Lo = DAG.getNode(ISD::FP_TO_UINT, SL, MVT::i32, Fma);
3504 SDValue Result = DAG.getNode(ISD::BITCAST, SL, MVT::i64,
3505 DAG.getBuildVector(MVT::v2i32, SL, {Lo, Hi}));
3510 Sign = DAG.getNode(ISD::BITCAST, SL, MVT::i64,
3511 DAG.getBuildVector(MVT::v2i32, SL, {Sign, Sign}));
3514 DAG.getNode(ISD::SUB, SL, MVT::i64,
3515 DAG.getNode(ISD::XOR, SL, MVT::i64, Result, Sign), Sign);
3806 SDLoc SL(N);
3840 = DAG.getLoad(NewVT, SL, LN->getChain(),
3843 SDValue BC = DAG.getNode(ISD::BITCAST, SL, VT, NewLoad);
3862 SDLoc SL(N);
3894 SDValue CastVal = DAG.getNode(ISD::BITCAST, SL, NewVT, Val);
3896 SDValue CastBack = DAG.getNode(ISD::BITCAST, SL, VT, CastVal);
3900 return DAG.getStore(SN->getChain(), SL, CastVal,
3917 SDLoc SL(N);
3922 SDValue NewInReg = DAG.getNode(N->getOpcode(), SL, SrcVT, Src, N1);
3923 return DAG.getNode(ISD::TRUNCATE, SL, N->getValueType(0), NewInReg);
3967 DAGCombinerInfo &DCI, const SDLoc &SL,
3974 SDValue LoRHS = DAG.getConstant(ValLo, SL, MVT::i32);
3975 SDValue HiRHS = DAG.getConstant(ValHi, SL, MVT::i32);
3977 SDValue LoAnd = DAG.getNode(Opc, SL, MVT::i32, Lo, LoRHS);
3978 SDValue HiAnd = DAG.getNode(Opc, SL, MVT::i32, Hi, HiRHS);
3985 SDValue Vec = DAG.getBuildVector(MVT::v2i32, SL, {LoAnd, HiAnd});
3986 return DAG.getNode(ISD::BITCAST, SL, MVT::i64, Vec);
4002 SDLoc SL(N);
4017 SDValue Vec = DAG.getBuildVector(MVT::v2i16, SL,
4018 { DAG.getConstant(0, SL, MVT::i16), LHS->getOperand(0) });
4019 return DAG.getNode(ISD::BITCAST, SL, MVT::i32, Vec);
4030 SDValue Shl = DAG.getNode(ISD::SHL, SL, XVT, X, SDValue(RHS, 0));
4031 return DAG.getZExtOrTrunc(Shl, SL, VT);
4046 SDValue ShiftAmt = DAG.getConstant(RHSVal - 32, SL, MVT::i32);
4048 SDValue Lo = DAG.getNode(ISD::TRUNCATE, SL, MVT::i32, LHS);
4049 SDValue NewShift = DAG.getNode(ISD::SHL, SL, MVT::i32, Lo, ShiftAmt);
4051 const SDValue Zero = DAG.getConstant(0, SL, MVT::i32);
4053 SDValue Vec = DAG.getBuildVector(MVT::v2i32, SL, {Zero, NewShift});
4054 return DAG.getNode(ISD::BITCAST, SL, MVT::i64, Vec);
4067 SDLoc SL(N);
4073 SDValue NewShift = DAG.getNode(ISD::SRA, SL, MVT::i32, Hi,
4074 DAG.getConstant(31, SL, MVT::i32));
4076 SDValue BuildVec = DAG.getBuildVector(MVT::v2i32, SL, {Hi, NewShift});
4077 return DAG.getNode(ISD::BITCAST, SL, MVT::i64, BuildVec);
4083 SDValue NewShift = DAG.getNode(ISD::SRA, SL, MVT::i32, Hi,
4084 DAG.getConstant(31, SL, MVT::i32));
4085 SDValue BuildVec = DAG.getBuildVector(MVT::v2i32, SL, {NewShift, NewShift});
4086 return DAG.getNode(ISD::BITCAST, SL, MVT::i64, BuildVec);
4102 SDLoc SL(N);
4112 ISD::AND, SL, VT,
4113 DAG.getNode(ISD::SRL, SL, VT, LHS.getOperand(0), N->getOperand(1)),
4114 DAG.getNode(ISD::SRL, SL, VT, LHS.getOperand(1), N->getOperand(1)));
4128 SDValue Zero = DAG.getConstant(0, SL, MVT::i32);
4132 SDValue NewConst = DAG.getConstant(ShiftAmt - 32, SL, MVT::i32);
4133 SDValue NewShift = DAG.getNode(ISD::SRL, SL, MVT::i32, Hi, NewConst);
4135 SDValue BuildPair = DAG.getBuildVector(MVT::v2i32, SL, {NewShift, Zero});
4137 return DAG.getNode(ISD::BITCAST, SL, MVT::i64, BuildPair);
4142 SDLoc SL(N);
4155 Elt0 = DAG.getNode(ISD::BITCAST, SL,
4159 return DAG.getNode(ISD::TRUNCATE, SL, VT, Elt0);
4176 SrcElt = DAG.getNode(ISD::BITCAST, SL,
4180 return DAG.getNode(ISD::TRUNCATE, SL, VT, SrcElt);
4211 SDValue Trunc = DAG.getNode(ISD::TRUNCATE, SL, MidVT,
4216 Amt = DAG.getZExtOrTrunc(Amt, SL, NewShiftVT);
4220 SDValue ShrunkShift = DAG.getNode(Src.getOpcode(), SL, MidVT,
4222 return DAG.getNode(ISD::TRUNCATE, SL, VT, ShrunkShift);
4234 static SDValue getMul24(SelectionDAG &DAG, const SDLoc &SL,
4238 return DAG.getNode(MulOpc, SL, MVT::i32, N0, N1);
4244 SDValue MulLo = DAG.getNode(MulLoOpc, SL, MVT::i32, N0, N1);
4245 SDValue MulHi = DAG.getNode(MulHiOpc, SL, MVT::i32, N0, N1);
4247 return DAG.getNode(ISD::BUILD_PAIR, SL, MVT::i64, MulLo, MulHi);
4486 SDValue AMDGPUTargetLowering::performCtlz_CttzCombine(const SDLoc &SL, SDValue Cond,
4503 return getFFBX_U32(DAG, CmpLHS, SL, Opc);
4514 return getFFBX_U32(DAG, CmpLHS, SL, Opc);
4522 const SDLoc &SL,
4529 SDValue NewSelect = DAG.getNode(ISD::SELECT, SL, VT, Cond,
4532 return DAG.getNode(Op, SL, VT, NewSelect);
4570 SDLoc SL(N);
4605 NewRHS = DAG.getNode(ISD::FNEG, SL, VT, RHS);
4610 SDValue NewSelect = DAG.getNode(ISD::SELECT, SL, VT,
4613 return DAG.getNode(LHS.getOpcode(), SL, VT, NewSelect);
4645 SDLoc SL(N);
4649 SDValue NewCond = DAG.getSetCC(SL, Cond.getValueType(), LHS, RHS, NewCC);
4650 return DAG.getNode(ISD::SELECT, SL, VT, NewCond, False, True);
4756 SDLoc SL(N);
4767 LHS = DAG.getNode(ISD::FNEG, SL, VT, LHS);
4772 RHS = DAG.getNode(ISD::FNEG, SL, VT, RHS);
4776 SDValue Res = DAG.getNode(ISD::FADD, SL, VT, LHS, RHS, N0->getFlags());
4780 DAG.ReplaceAllUsesWith(N0, DAG.getNode(ISD::FNEG, SL, VT, Res));
4795 RHS = DAG.getNode(ISD::FNEG, SL, VT, RHS);
4797 SDValue Res = DAG.getNode(Opc, SL, VT, LHS, RHS, N0->getFlags());
4801 DAG.ReplaceAllUsesWith(N0, DAG.getNode(ISD::FNEG, SL, VT, Res));
4820 MHS = DAG.getNode(ISD::FNEG, SL, VT, MHS);
4823 RHS = DAG.getNode(ISD::FNEG, SL, VT, RHS);
4827 SDValue Res = DAG.getNode(Opc, SL, VT, LHS, MHS, RHS);
4831 DAG.ReplaceAllUsesWith(N0, DAG.getNode(ISD::FNEG, SL, VT, Res));
4855 SDValue NegLHS = DAG.getNode(ISD::FNEG, SL, VT, LHS);
4856 SDValue NegRHS = DAG.getNode(ISD::FNEG, SL, VT, RHS);
4859 SDValue Res = DAG.getNode(Opposite, SL, VT, NegLHS, NegRHS, N0->getFlags());
4863 DAG.ReplaceAllUsesWith(N0, DAG.getNode(ISD::FNEG, SL, VT, Res));
4869 Ops[I] = DAG.getNode(ISD::FNEG, SL, VT, N0->getOperand(I), N0->getFlags());
4871 SDValue Res = DAG.getNode(AMDGPUISD::FMED3, SL, VT, Ops, N0->getFlags());
4876 SDValue Neg = DAG.getNode(ISD::FNEG, SL, VT, Res);
4900 return DAG.getNode(Opc, SL, VT, CvtSrc.getOperand(0));
4908 SDValue Neg = DAG.getNode(ISD::FNEG, SL, CvtSrc.getValueType(), CvtSrc);
4909 return DAG.getNode(Opc, SL, VT, Neg, N0->getFlags());
4916 return DAG.getNode(ISD::FP_ROUND, SL, VT,
4924 SDValue Neg = DAG.getNode(ISD::FNEG, SL, CvtSrc.getValueType(), CvtSrc);
4925 return DAG.getNode(ISD::FP_ROUND, SL, VT, Neg, N0.getOperand(1));
4931 SDLoc SL(N);
4937 SDValue IntFNeg = DAG.getNode(ISD::XOR, SL, SrcVT, Src,
4938 DAG.getConstant(0x8000, SL, SrcVT));
4939 return DAG.getNode(ISD::FP16_TO_FP, SL, N->getValueType(0), IntFNeg);
4947 SDLoc SL(N);
4964 SDValue CastHi = DAG.getNode(ISD::BITCAST, SL, MVT::f32, HighBits);
4965 SDValue NegHi = DAG.getNode(ISD::FNEG, SL, MVT::f32, CastHi);
4967 DAG.getNode(ISD::BITCAST, SL, HighBits.getValueType(), NegHi);
4973 DAG.getNode(ISD::BUILD_VECTOR, SL, BCSrc.getValueType(), Ops);
4974 SDValue Result = DAG.getNode(ISD::BITCAST, SL, VT, Build);
4977 DAG.ReplaceAllUsesWith(N0, DAG.getNode(ISD::FNEG, SL, VT, Result));
4989 DAG.getNode(ISD::BITCAST, SL, MVT::f32, BCSrc.getOperand(1));
4991 DAG.getNode(ISD::BITCAST, SL, MVT::f32, BCSrc.getOperand(2));
4993 SDValue NegLHS = DAG.getNode(ISD::FNEG, SL, MVT::f32, LHS);
4994 SDValue NegRHS = DAG.getNode(ISD::FNEG, SL, MVT::f32, RHS);
4996 return DAG.getNode(ISD::SELECT, SL, MVT::f32, BCSrc.getOperand(0), NegLHS,
5018 SDLoc SL(N);
5023 SDValue IntFAbs = DAG.getNode(ISD::AND, SL, SrcVT, Src,
5024 DAG.getConstant(0x7fff, SL, SrcVT));
5025 return DAG.getNode(ISD::FP16_TO_FP, SL, N->getValueType(0), IntFAbs);
5072 SDLoc SL(N);
5078 return DAG.getBuildVector(DestVT, SL, CastedElts);
5092 SDLoc SL(N);
5094 SDValue BV = DAG.getNode(ISD::BUILD_VECTOR, SL, MVT::v2i32,
5095 DAG.getConstant(Lo_32(CVal), SL, MVT::i32),
5096 DAG.getConstant(Hi_32(CVal), SL, MVT::i32));
5097 return DAG.getNode(ISD::BITCAST, SL, DestVT, BV);
5102 SDLoc SL(N);
5104 SDValue Vec = DAG.getNode(ISD::BUILD_VECTOR, SL, MVT::v2i32,
5105 DAG.getConstant(Lo_32(CVal), SL, MVT::i32),
5106 DAG.getConstant(Hi_32(CVal), SL, MVT::i32));
5108 return DAG.getNode(ISD::BITCAST, SL, DestVT, Vec);
5294 const SDLoc &SL,
5310 return DAG.getCopyFromReg(DAG.getEntryNode(), SL, VReg, VT);
5329 const SDLoc &SL,
5338 return DAG.getLoad(VT, SL, DAG.getEntryNode(), Ptr, SrcPtrInfo, Align(4),
5344 const SDLoc &SL,
5352 SDValue Ptr = DAG.getConstant(Offset, SL, MVT::i32);
5355 DAG.getCopyFromReg(Chain, SL, Info->getStackPtrOffsetReg(), MVT::i32);
5356 Ptr = DAG.getNode(ISD::ADD, SL, MVT::i32, SP, Ptr);
5357 SDValue Store = DAG.getStore(Chain, SL, ArgVal, Ptr, DstInfo, Align(4),
5364 EVT VT, const SDLoc &SL,
5369 CreateLiveInRegister(DAG, RC, Arg.getRegister(), VT, SL) :
5370 loadStackInputValue(DAG, VT, SL, Arg.getStackOffset());
5377 V = DAG.getNode(ISD::SRL, SL, VT, V,
5378 DAG.getShiftAmountConstant(Shift, VT, SL));
5379 return DAG.getNode(ISD::AND, SL, VT, V,
5380 DAG.getConstant(Mask >> Shift, SL, VT));