Lines Matching defs:Src
91 SDValue Src = In.getOperand(0);
92 if (Src.getValueType().getSizeInBits() == 32)
93 return stripBitcast(Src);
2360 SDValue Src = N->getOperand(0);
2361 if (Src.getOpcode() != ISD::SRL)
2364 const ConstantSDNode *Amt = dyn_cast<ConstantSDNode>(Src.getOperand(1));
2369 ReplaceNode(N, getBFE32(true, SDLoc(N), Src.getOperand(0),
2520 SDValue Src = N->getOperand(0);
2521 if (Src.getValueType() == MVT::f16) {
2522 if (isExtractHiElt(Src, Src)) {
2524 {Src});
2784 SDValue Src = N->getOperand(1);
2785 CurDAG->SelectNodeTo(N, Opcode, N->getVTList(), {Src});
2852 bool AMDGPUDAGToDAGISel::SelectVOP3ModsImpl(SDValue In, SDValue &Src,
2857 Src = In;
2859 if (Src.getOpcode() == ISD::FNEG) {
2861 Src = Src.getOperand(0);
2862 } else if (Src.getOpcode() == ISD::FSUB && IsCanonicalizing) {
2865 auto *LHS = dyn_cast<ConstantFPSDNode>(Src.getOperand(0));
2868 Src = Src.getOperand(1);
2872 if (AllowAbs && Src.getOpcode() == ISD::FABS) {
2874 Src = Src.getOperand(0);
2880 bool AMDGPUDAGToDAGISel::SelectVOP3Mods(SDValue In, SDValue &Src,
2883 if (SelectVOP3ModsImpl(In, Src, Mods, /*IsCanonicalizing=*/true,
2893 SDValue In, SDValue &Src, SDValue &SrcMods) const {
2895 if (SelectVOP3ModsImpl(In, Src, Mods, /*IsCanonicalizing=*/false,
2904 bool AMDGPUDAGToDAGISel::SelectVOP3BMods(SDValue In, SDValue &Src,
2907 if (SelectVOP3ModsImpl(In, Src, Mods,
2917 bool AMDGPUDAGToDAGISel::SelectVOP3NoMods(SDValue In, SDValue &Src) const {
2921 Src = In;
2925 bool AMDGPUDAGToDAGISel::SelectVINTERPModsImpl(SDValue In, SDValue &Src,
2929 if (SelectVOP3ModsImpl(In, Src, Mods,
2941 bool AMDGPUDAGToDAGISel::SelectVINTERPMods(SDValue In, SDValue &Src,
2943 return SelectVINTERPModsImpl(In, Src, SrcMods, /* OpSel */ false);
2946 bool AMDGPUDAGToDAGISel::SelectVINTERPModsHi(SDValue In, SDValue &Src,
2948 return SelectVINTERPModsImpl(In, Src, SrcMods, /* OpSel */ true);
2951 bool AMDGPUDAGToDAGISel::SelectVOP3Mods0(SDValue In, SDValue &Src,
2958 return SelectVOP3Mods(In, Src, SrcMods);
2961 bool AMDGPUDAGToDAGISel::SelectVOP3BMods0(SDValue In, SDValue &Src,
2968 return SelectVOP3BMods(In, Src, SrcMods);
2971 bool AMDGPUDAGToDAGISel::SelectVOP3OMods(SDValue In, SDValue &Src,
2973 Src = In;
2982 bool AMDGPUDAGToDAGISel::SelectVOP3PMods(SDValue In, SDValue &Src,
2985 Src = In;
2988 if (Src.getOpcode() == ISD::FNEG) {
2990 Src = Src.getOperand(0);
2993 if (Src.getOpcode() == ISD::BUILD_VECTOR && Src.getNumOperands() == 2 &&
2997 SDValue Lo = stripBitcast(Src.getOperand(0));
2998 SDValue Hi = stripBitcast(Src.getOperand(1));
3016 unsigned VecSize = Src.getValueSizeInBits();
3040 Src = Lo;
3055 Src = SDValue(CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, SL,
3056 Src.getValueType(), Ops), 0);
3066 Src = CurDAG->getTargetConstant(Lit, SDLoc(In), MVT::i64);
3082 bool AMDGPUDAGToDAGISel::SelectVOP3PModsDOT(SDValue In, SDValue &Src,
3084 return SelectVOP3PMods(In, Src, SrcMods, true);
3087 bool AMDGPUDAGToDAGISel::SelectVOP3PModsNeg(SDValue In, SDValue &Src) const {
3098 Src = CurDAG->getTargetConstant(Mods, SDLoc(In), MVT::i32);
3103 SDValue &Src) const {
3112 Src = CurDAG->getTargetConstant(Mods, SDLoc(In), MVT::i32);
3185 SmallVectorImpl<SDValue> &Elts, SDValue &Src,
3199 Src = SDValue(buildRegSequence(Elts, CurDAG, DL, ElementSize), 0);
3203 Src = SDValue(buildRegSequence(NegAbsElts, CurDAG, DL, ElementSize), 0);
3209 Src = SDValue(buildRegSequence(Elts, CurDAG, DL, ElementSize), 0);
3230 bool AMDGPUDAGToDAGISel::SelectWMMAModsF16Neg(SDValue In, SDValue &Src,
3232 Src = In;
3248 Src = SDValue(buildRegSequence16(EltsF16, CurDAG, SDLoc(In)), 0);
3267 Src = SDValue(buildRegSequence32(EltsV2F16, CurDAG, SDLoc(In)), 0);
3277 bool AMDGPUDAGToDAGISel::SelectWMMAModsF16NegAbs(SDValue In, SDValue &Src,
3279 Src = In;
3298 selectWMMAModsNegAbs(ModOpcode, Mods, EltsF16, Src, CurDAG, SDLoc(In),
3318 selectWMMAModsNegAbs(ModOpcode, Mods, EltsV2F16, Src, CurDAG, SDLoc(In),
3326 bool AMDGPUDAGToDAGISel::SelectWMMAModsF32NegAbs(SDValue In, SDValue &Src,
3328 Src = In;
3347 selectWMMAModsNegAbs(ModOpcode, Mods, EltsF32, Src, CurDAG, SDLoc(In),
3355 bool AMDGPUDAGToDAGISel::SelectWMMAVISrc(SDValue In, SDValue &Src) const {
3362 Src = CurDAG->getTargetConstant(Imm, SDLoc(In), MVT::i32);
3367 Src = CurDAG->getTargetConstant(Imm, SDLoc(In), MVT::i32);
3396 Src = CurDAG->getTargetConstant(RawValue.value(), SDLoc(In),
3402 Src = CurDAG->getTargetConstant(RawValue.value(), SDLoc(In),
3415 bool AMDGPUDAGToDAGISel::SelectSWMMACIndex8(SDValue In, SDValue &Src,
3418 Src = In;
3426 Src = ShiftSrc;
3434 bool AMDGPUDAGToDAGISel::SelectSWMMACIndex16(SDValue In, SDValue &Src,
3437 Src = In;
3445 Src = ShiftSrc;
3453 bool AMDGPUDAGToDAGISel::SelectVOP3OpSel(SDValue In, SDValue &Src,
3455 Src = In;
3461 bool AMDGPUDAGToDAGISel::SelectVOP3OpSelMods(SDValue In, SDValue &Src,
3464 return SelectVOP3Mods(In, Src, SrcMods);
3469 bool AMDGPUDAGToDAGISel::SelectVOP3PMadMixModsImpl(SDValue In, SDValue &Src,
3472 SelectVOP3ModsImpl(In, Src, Mods);
3474 if (Src.getOpcode() == ISD::FP_EXTEND) {
3475 Src = Src.getOperand(0);
3476 assert(Src.getValueType() == MVT::f16);
3477 Src = stripBitcast(Src);
3483 SelectVOP3ModsImpl(Src, Src, ModsTmp);
3498 if (isExtractHiElt(Src, Src)) {
3510 bool AMDGPUDAGToDAGISel::SelectVOP3PMadMixModsExt(SDValue In, SDValue &Src,
3513 if (!SelectVOP3PMadMixModsImpl(In, Src, Mods))
3519 bool AMDGPUDAGToDAGISel::SelectVOP3PMadMixMods(SDValue In, SDValue &Src,
3522 SelectVOP3PMadMixModsImpl(In, Src, Mods);
3542 SDValue Src;
3543 if (isExtractHiElt(In, Src))
3544 return Src;