Lines Matching defs:SL
966 SDLoc SL(N);
987 SDLoc SL(N);
1002 SDLoc SL(N);
1022 SDLoc SL(N);
1031 SDValue Clamp = CurDAG->getTargetConstant(0, SL, MVT::i1);
1040 SDLoc SL(N);
1049 SDValue Zero = CurDAG->getTargetConstant(0, SL, MVT::i64);
1050 SDValue Clamp = CurDAG->getTargetConstant(0, SL, MVT::i1);
1052 SDNode *Mad = CurDAG->getMachineNode(Opc, SL, N->getVTList(), Ops);
1054 SDValue Sub0 = CurDAG->getTargetConstant(AMDGPU::sub0, SL, MVT::i32);
1055 SDNode *Lo = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG, SL,
1060 SDValue Sub1 = CurDAG->getTargetConstant(AMDGPU::sub1, SL, MVT::i32);
1061 SDNode *Hi = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG, SL,
1783 SDLoc SL(N);
1793 AMDGPU::V_MOV_B32_e32, SL, MVT::i32,
1953 SDLoc SL(N);
1962 AMDGPU::V_MOV_B32_e32, SL, MVT::i32,
2056 SDLoc SL(ByteOffsetNode);
2064 *Offset = CurDAG->getTargetConstant(*EncodedOffset, SL, MVT::i32);
2074 *Offset = CurDAG->getTargetConstant(*EncodedOffset, SL, MVT::i32);
2082 SDValue C32Bit = CurDAG->getTargetConstant(ByteOffset, SL, MVT::i32);
2084 CurDAG->getMachineNode(AMDGPU::S_MOV_B32, SL, MVT::i32, C32Bit), 0);
2096 SDLoc SL(Addr);
2101 SDValue AddrHi = CurDAG->getTargetConstant(AddrHiVal, SL, MVT::i32);
2104 CurDAG->getTargetConstant(AMDGPU::SReg_64_XEXECRegClassID, SL, MVT::i32),
2106 CurDAG->getTargetConstant(AMDGPU::sub0, SL, MVT::i32),
2107 SDValue(CurDAG->getMachineNode(AMDGPU::S_MOV_B32, SL, MVT::i32, AddrHi),
2109 CurDAG->getTargetConstant(AMDGPU::sub1, SL, MVT::i32),
2112 return SDValue(CurDAG->getMachineNode(AMDGPU::REG_SEQUENCE, SL, MVT::i64,
2485 SDLoc SL(N);
2503 SL, MVT::i1,
2511 SDValue VCC = CurDAG->getCopyToReg(N->getOperand(0), SL, CondReg, Cond);
2618 SDLoc SL(N);
2635 glueCopyToM0(N, CurDAG->getTargetConstant(0, SL, MVT::i32));
2647 = CurDAG->getMachineNode(AMDGPU::V_READFIRSTLANE_B32, SL, MVT::i32,
2651 = CurDAG->getMachineNode(AMDGPU::S_LSHL_B32, SL, MVT::i32,
2653 CurDAG->getTargetConstant(16, SL, MVT::i32));
2658 SDValue OffsetField = CurDAG->getTargetConstant(ImmOffset, SL, MVT::i32);
2829 SDLoc SL(N);
2835 Subtarget->getWavefrontSizeLog2(), SL, MVT::i32);
2838 SrcVal = SDValue(CurDAG->getMachineNode(AMDGPU::V_READFIRSTLANE_B32, SL,
2843 CopyVal = SDValue(CurDAG->getMachineNode(AMDGPU::S_LSHL_B32, SL, MVT::i32,
2848 SDValue CopyToSP = CurDAG->getCopyToReg(N->getOperand(0), SL, SP, CopyVal);
3044 SDLoc SL(In);
3046 CurDAG->getMachineNode(TargetOpcode::IMPLICIT_DEF, SL,
3051 CurDAG->getTargetConstant(RC, SL, MVT::i32),
3052 Lo, CurDAG->getTargetConstant(AMDGPU::sub0, SL, MVT::i32),
3053 Undef, CurDAG->getTargetConstant(AMDGPU::sub1, SL, MVT::i32) };
3055 Src = SDValue(CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, SL,
3532 SDLoc SL(In);
3533 return CurDAG->getConstant(C->getZExtValue() << 16, SL, MVT::i32);
3537 SDLoc SL(In);
3539 C->getValueAPF().bitcastToAPInt().getZExtValue() << 16, SL, MVT::i32);