Lines Matching defs:SAddr

1764                                            SDValue &SAddr,
1796           SAddr = LHS;
1823         SAddr = LHS;
1828     if (!SAddr && !RHS->isDivergent()) {
1831         SAddr = RHS;
1836     if (SAddr) {
1848   SAddr = Addr;
1857 static SDValue SelectSAddrFI(SelectionDAG *CurDAG, SDValue SAddr) {
1858   if (auto FI = dyn_cast<FrameIndexSDNode>(SAddr)) {
1859     SAddr = CurDAG->getTargetFrameIndex(FI->getIndex(), FI->getValueType(0));
1860   } else if (SAddr.getOpcode() == ISD::ADD &&
1861              isa<FrameIndexSDNode>(SAddr.getOperand(0))) {
1864     auto FI = cast<FrameIndexSDNode>(SAddr.getOperand(0));
1867     SAddr = SDValue(CurDAG->getMachineNode(AMDGPU::S_ADD_I32, SDLoc(SAddr),
1868                                            MVT::i32, TFI, SAddr.getOperand(1)),
1872   return SAddr;
1877                                             SDValue &SAddr,
1888     SAddr = Addr.getOperand(0);
1890     SAddr = Addr;
1893   SAddr = SelectSAddrFI(CurDAG, SAddr);
1906         SAddr.getOpcode() == ISD::TargetFrameIndex
1909     SAddr = SDValue(CurDAG->getMachineNode(AMDGPU::S_ADD_I32, DL, MVT::i32,
1910                                            SAddr, AddOffset),
1921     SDValue VAddr, SDValue SAddr, uint64_t ImmOffset) const {
1931       CurDAG->computeKnownBits(SAddr),
1939                                              SDValue &VAddr, SDValue &SAddr,
1965         SAddr = LHS;
1968         if (checkFlatScratchSVSSwizzleBug(VAddr, SAddr, SplitImmOffset))
1983     SAddr = LHS;
1986     SAddr = RHS;
2000   if (checkFlatScratchSVSSwizzleBug(VAddr, SAddr, ImmOffset))
2002   SAddr = SelectSAddrFI(CurDAG, SAddr);