Lines Matching defs:Elts

3116 static MachineSDNode *buildRegSequence32(SmallVectorImpl<SDValue> &Elts,
3121   switch (Elts.size()) {
3140   for (unsigned i = 0; i < Elts.size(); ++i) {
3141     Ops.push_back(Elts[i]);
3148 static MachineSDNode *buildRegSequence16(SmallVectorImpl<SDValue> &Elts,
3153          (Elts.size() == 8 || Elts.size() == 16));
3157   for (unsigned i = 0; i < Elts.size(); i += 2) {
3158     SDValue LoSrc = stripExtractLoElt(stripBitcast(Elts[i]));
3160     if (isExtractHiElt(Elts[i + 1], HiSrc) && LoSrc == HiSrc) {
3166                                  {Elts[i + 1], Elts[i], PackLoLo});
3174 static MachineSDNode *buildRegSequence(SmallVectorImpl<SDValue> &Elts,
3178     return buildRegSequence16(Elts, CurDAG, DL);
3180     return buildRegSequence32(Elts, CurDAG, DL);
3185                                  SmallVectorImpl<SDValue> &Elts, SDValue &Src,
3192     for (auto El : Elts) {
3197     if (Elts.size() != NegAbsElts.size()) {
3199       Src = SDValue(buildRegSequence(Elts, CurDAG, DL, ElementSize), 0);
3209     Src = SDValue(buildRegSequence(Elts, CurDAG, DL, ElementSize), 0);