Lines Matching defs:SGID
92 unsigned SGID;
104 InstructionRule(const SIInstrInfo *TII, unsigned SGID,
106 : TII(TII), SGID(SGID) {
134 // SGID is used to map instructions to candidate SchedGroups
135 unsigned SGID;
140 // Count of the number of created SchedGroups, used to initialize SGID.
226 int getSGID() { return SGID; }
233 SGID = NumSchedGroups++;
239 SGID = NumSchedGroups++;
342 int addEdges(SmallVectorImpl<SchedGroup> &SyncPipeline, SUnit *SU, int SGID,
344 /// Link the pipeline as if \p SU was in the SchedGroup with ID \p SGID. It
348 int linkSUnit(SUnit *SU, int SGID,
452 LLVM_DEBUG(dbgs() << "SchedGroup with SGID " << SG.getSGID()
476 SUnit *SU, int SGID, std::vector<std::pair<SUnit *, SUnit *>> &AddedEdges,
481 if (I->getSGID() == SGID) {
493 SmallVectorImpl<SchedGroup> &SyncPipeline, SUnit *SU, int SGID,
499 // candidate SGID are successors of the candidate SchedGroup, thus the current
504 return IsBottomUp ? linkSUnit(SU, SGID, AddedEdges, SyncPipeline.rbegin(),
506 : linkSUnit(SU, SGID, AddedEdges, SyncPipeline.begin(),
742 LLVM_DEBUG(dbgs() << "Trying SGID # " << CandSGID << " with Mask "
746 LLVM_DEBUG(dbgs() << "SGID # " << CandSGID << " is full\n");
750 LLVM_DEBUG(dbgs() << "SGID # " << CandSGID << " has conflicting rule\n");
965 IsPipeExp(const SIInstrInfo *TII, unsigned SGID, bool NeedsCache = false)
966 : InstructionRule(TII, SGID, NeedsCache) {}
1005 EnablesNthMFMA(unsigned Number, const SIInstrInfo *TII, unsigned SGID,
1007 : InstructionRule(TII, SGID, NeedsCache), Number(Number) {}
1052 const SIInstrInfo *TII, unsigned SGID,
1054 : InstructionRule(TII, SGID, NeedsCache), Number(Number),
1092 LessThanNSuccs(unsigned Size, const SIInstrInfo *TII, unsigned SGID,
1094 : InstructionRule(TII, SGID, NeedsCache), Size(Size),
1134 unsigned SGID, bool HasIntermediary = false,
1136 : InstructionRule(TII, SGID, NeedsCache), Size(Size),
1149 IsCvt(const SIInstrInfo *TII, unsigned SGID, bool NeedsCache = false)
1150 : InstructionRule(TII, SGID, NeedsCache) {}
1161 IsFMA(const SIInstrInfo *TII, unsigned SGID, bool NeedsCache = false)
1162 : InstructionRule(TII, SGID, NeedsCache) {}
1172 IsPipeAdd(const SIInstrInfo *TII, unsigned SGID, bool NeedsCache = false)
1173 : InstructionRule(TII, SGID, NeedsCache) {}
1190 if ((unsigned)PipeSG.getSGID() == SGID - Distance)
1209 unsigned SGID, bool NeedsCache = false)
1210 : InstructionRule(TII, SGID, NeedsCache), Distance(Distance) {}
1227 if ((unsigned)PipeSG.getSGID() == SGID - Distance)
1245 unsigned SGID, bool NeedsCache = false)
1246 : InstructionRule(TII, SGID, NeedsCache), Distance(Distance) {}
1260 OccursAtOrAfterNode(unsigned Number, const SIInstrInfo *TII, unsigned SGID,
1262 : InstructionRule(TII, SGID, NeedsCache), Number(Number) {}
1305 unsigned SGID, bool NeedsCache = false)
1306 : InstructionRule(TII, SGID, NeedsCache), Number(Number),
1333 OccursAfterExp(const SIInstrInfo *TII, unsigned SGID,
1335 : InstructionRule(TII, SGID, NeedsCache) {}
1884 EnablesInitialMFMA(const SIInstrInfo *TII, unsigned SGID,
1886 : InstructionRule(TII, SGID, NeedsCache) {}
1923 IsPermForDSW(const SIInstrInfo *TII, unsigned SGID, bool NeedsCache = false)
1924 : InstructionRule(TII, SGID, NeedsCache) {}
1934 if ((unsigned)PipeSG.getSGID() == SGID - 1) {
1954 IsSuccOfPrevGroup(const SIInstrInfo *TII, unsigned SGID,
1956 : InstructionRule(TII, SGID, NeedsCache) {}
1992 VMEMSize(const SIInstrInfo *TII, unsigned SGID, bool NeedsCache = false)
1993 : InstructionRule(TII, SGID, NeedsCache) {}
2012 if ((unsigned)PipeSG.getSGID() == SGID - Distance) {
2043 unsigned SGID, bool NeedsCache = false)
2044 : InstructionRule(TII, SGID, NeedsCache), Distance(Distance) {}
2535 SyncedInstrs[&SU].push_back(SGID);
2551 SyncedInstrs[&SU].push_back(SGID);