Lines Matching defs:AMDGPUCodeGenPrepare

1 //===-- AMDGPUCodeGenPrepare.cpp ------------------------------------------===//
44   cl::desc("Widen sub-dword constant address space loads in AMDGPUCodeGenPrepare"),
50   cl::desc("Widen uniform 16-bit instructions to 32-bit in AMDGPUCodeGenPrepare"),
72   cl::desc("Introduce mul24 intrinsics in AMDGPUCodeGenPrepare"),
79   cl::desc("Expand 64-bit division in AMDGPUCodeGenPrepare"),
87   cl::desc("Prevent expanding integer division in AMDGPUCodeGenPrepare"),
94   cl::desc("Prevent expanding floating point division in AMDGPUCodeGenPrepare"),
323 class AMDGPUCodeGenPrepare : public FunctionPass {
329   AMDGPUCodeGenPrepare() : FunctionPass(ID) {
2263 bool AMDGPUCodeGenPrepare::doInitialization(Module &M) {
2271 bool AMDGPUCodeGenPrepare::runOnFunction(Function &F) {
2315 INITIALIZE_PASS_BEGIN(AMDGPUCodeGenPrepare, DEBUG_TYPE,
2320 INITIALIZE_PASS_END(AMDGPUCodeGenPrepare, DEBUG_TYPE, "AMDGPU IR optimizations",
2323 char AMDGPUCodeGenPrepare::ID = 0;
2326   return new AMDGPUCodeGenPrepare();