Lines Matching defs:S32
75 LLT S32 = LLT::scalar(32);
76 if (Ty != S32) {
81 ExtReg = MIRBuilder.buildPtrToInt(S32, ExtReg).getReg(0);
83 ExtReg = MIRBuilder.buildBitcast(S32, ExtReg).getReg(0);
199 const LLT S32 = LLT::scalar(32);
226 auto OffsetReg = MIRBuilder.buildConstant(S32, Offset);
877 const LLT S32 = LLT::scalar(32);
889 InputReg = MRI.createGenericVirtualRegister(S32);
893 InputReg = MIRBuilder.buildConstant(S32, 0).getReg(0);
899 Register Y = MRI.createGenericVirtualRegister(S32);
903 Y = MIRBuilder.buildShl(S32, Y, MIRBuilder.buildConstant(S32, 10)).getReg(0);
904 InputReg = InputReg ? MIRBuilder.buildOr(S32, InputReg, Y).getReg(0) : Y;
909 Register Z = MRI.createGenericVirtualRegister(S32);
913 Z = MIRBuilder.buildShl(S32, Z, MIRBuilder.buildConstant(S32, 20)).getReg(0);
914 InputReg = InputReg ? MIRBuilder.buildOr(S32, InputReg, Z).getReg(0) : Z;
919 InputReg = MRI.createGenericVirtualRegister(S32);
933 &AMDGPU::VGPR_32RegClass, S32);