Lines Matching defs:STM
159 const GCNSubtarget &STM = MF->getSubtarget<GCNSubtarget>();
163 if (STM.requiresCodeObjectV6() && CodeObjectVersion < AMDGPU::AMDHSA_COV6) {
165 STM.getCPU() + " is only available on code object version 6 or better",
174 const auto &FunctionTargetID = STM.getTargetID();
197 if (STM.isMesaKernel(F) &&
202 KernelCode.validate(&STM, MF->getContext());
206 if (STM.isAmdHsaOS())
210 assert(AMDGPU::hasKernargPreload(STM));
212 STM.isAmdHsaOS());
237 const GCNSubtarget &STM = MF->getSubtarget<GCNSubtarget>();
242 STM, KernelName, getAmdhsaKernelDescriptor(*MF, CurrentProgramInfo),
277 const GCNSubtarget &STM = MF->getSubtarget<GCNSubtarget>();
278 if (MFI->isEntryFunction() && STM.isAmdHsaOrMesa(MF->getFunction())) {
483 const GCNSubtarget &STM = MF.getSubtarget<GCNSubtarget>();
496 STM.getKernArgSegmentSize(F, MaxKernArgAlign), Ctx);
498 KernelDescriptor.compute_pgm_rsrc1 = PI.getComputePGMRSrc1(STM, Ctx);
507 assert(STM.hasGFX90AInsts() || !EvaluatableRsrc3 ||
512 AMDGPU::hasKernargPreload(STM) ? Info->getNumKernargPreloadedSGPRs() : 0,
536 const GCNSubtarget &STM = MF.getSubtarget<GCNSubtarget>();
539 if (!STM.isAmdHsaOS() && !STM.isAmdPalOS()) {
549 if (STM.isAmdPalOS()) {
554 } else if (!STM.isAmdHsaOS()) {
559 if (STM.dumpCode()) {
574 STM.hasMAIInsts());
587 STM.hasMAIInsts() ? Info.NumAGPR : std::optional<uint32_t>(),
588 Info.getTotalNumVGPRs(STM),
597 STM.hasMAIInsts() ? CurrentProgramInfo.NumAccVGPR : nullptr,
624 if (STM.hasGFX90AInsts()) {
663 assert(STM.hasGFX90AInsts() ||
667 if (STM.hasGFX90AInsts()) {
724 const GCNSubtarget &STM = TM.getSubtarget<GCNSubtarget>(F);
725 const IsaInfo::AMDGPUTargetID &STMTargetID = STM.getTargetID();
736 const GCNSubtarget &STM = MF.getSubtarget<GCNSubtarget>();
737 const SIInstrInfo *TII = STM.getInstrInfo();
760 const GCNSubtarget &STM = MF.getSubtarget<GCNSubtarget>();
778 ProgInfo.NumVGPR = CreateExpr(Info.getTotalNumVGPRs(STM));
781 ProgInfo.TgSplit = STM.isTgSplitEnabled();
790 STM.getMaxWaveScratchSize() / STM.getWavefrontSize();
809 if (STM.getGeneration() >= AMDGPUSubtarget::VOLCANIC_ISLANDS &&
810 !STM.hasSGPRInitBug()) {
811 unsigned MaxAddressableNumSGPRs = STM.getAddressableNumSGPRs();
836 F.getCallingConv() == CallingConv::AMDGPU_PS && !STM.isAmdHsaOS();
912 CreateExpr(STM.getMinNumSGPRs(MaxWaves))},
916 CreateExpr(STM.getMinNumVGPRs(MaxWaves))},
919 if (STM.getGeneration() <= AMDGPUSubtarget::SEA_ISLANDS ||
920 STM.hasSGPRInitBug()) {
921 unsigned MaxAddressableNumSGPRs = STM.getAddressableNumSGPRs();
937 if (STM.hasSGPRInitBug()) {
944 if (MFI->getNumUserSGPRs() > STM.getMaxNumUserSGPRs()) {
948 STM.getMaxNumUserSGPRs(), DS_Error);
953 static_cast<unsigned>(STM.getAddressableLocalMemorySize())) {
957 STM.getAddressableLocalMemorySize(), DS_Error);
976 IsaInfo::getSGPREncodingGranule(&STM));
978 IsaInfo::getVGPREncodingGranule(&STM));
992 if (STM.getGeneration() < AMDGPUSubtarget::SEA_ISLANDS) {
1016 STM.getGeneration() >= AMDGPUSubtarget::GFX11 ? 8 : 10;
1022 CreateExpr(STM.getWavefrontSize()), Ctx),
1026 ProgInfo.WgpMode = STM.isCuModeEnabled() ? 0 : 1;
1050 STM.isAmdHsaOS() ? 0 : STM.isTrapHandlerEnabled();
1058 ProgInfo.LdsSize = STM.isAmdHsaOS() ? 0 : ProgInfo.LDSBlocks;
1061 if (STM.hasGFX90AInsts()) {
1084 STM.computeOccupancy(F, ProgInfo.LDSSize), ProgInfo.NumSGPRsForWavesPerEU,
1085 ProgInfo.NumVGPRsForWavesPerEU, STM, Ctx);
1117 const GCNSubtarget &STM = MF.getSubtarget<GCNSubtarget>();
1140 EmitResolvedOrExpr(CurrentProgramInfo.getComputePGMRSrc1(STM, Ctx),
1150 if (STM.getGeneration() >= AMDGPUSubtarget::GFX12) {
1154 } else if (STM.getGeneration() == AMDGPUSubtarget::GFX11) {
1178 if (STM.getGeneration() >= AMDGPUSubtarget::GFX12) {
1182 } else if (STM.getGeneration() == AMDGPUSubtarget::GFX11) {
1195 unsigned ExtraLDSSize = STM.getGeneration() >= AMDGPUSubtarget::GFX11
1248 const GCNSubtarget &STM = MF.getSubtarget<GCNSubtarget>();
1249 if (STM.hasMAIInsts()) {
1255 MD->setRsrc1(CC, CurrentProgramInfo.getPGMRSrc1(CC, STM, Ctx), Ctx);
1269 EmitPALMetadataCommon(MD, CurrentProgramInfo, CC, STM);
1280 unsigned ExtraLDSSize = STM.getGeneration() >= AMDGPUSubtarget::GFX11
1293 STM.getGeneration() >= AMDGPUSubtarget::GFX11 ? 256 : 128;
1320 if (MD->getPALMajorVersion() < 3 && STM.isWave32())
1371 const GCNSubtarget &STM = MF.getSubtarget<GCNSubtarget>();
1374 Out.initDefault(&STM, Ctx, /*InitMCExpr=*/false);
1377 CurrentProgramInfo.getComputePGMRSrc1(STM, Ctx);
1385 getElementByteSizeValue(STM.getMaxPrivateElementSize(true)));
1413 if (STM.isXNACKEnabled())
1417 Out.kernarg_segment_byte_size = STM.getKernArgSegmentSize(F, MaxKernArgAlign);