Lines Matching defs:Idx
94 // First, the Idx.
104 #define CHECK_PARTIALMAP(Idx, ValStartIdx, ValLength, RB) \
107 checkPartialMap(PartialMappingIdx::Idx, ValStartIdx, ValLength, RB) && \
108 #Idx " is incorrectly initialized"); \
458 for (unsigned Idx = 1; Idx != NumOperands; ++Idx) {
459 LLT OpTy = MRI.getType(MI.getOperand(Idx).getReg());
757 for (unsigned Idx = 0; Idx < NumOperands; ++Idx) {
758 auto &MO = MI.getOperand(Idx);
765 OpSize[Idx] = Ty.getSizeInBits().getKnownMinValue();
771 OpRegBankIdx[Idx] = PMI_FirstFPR;
774 OpRegBankIdx[Idx] = PMI_FirstFPR;
776 OpRegBankIdx[Idx] = PMI_FirstGPR;
964 for (unsigned Idx = 2; Idx < 4; ++Idx) {
965 Register VReg = MI.getOperand(Idx).getReg();
992 for (unsigned Idx = 0, NumOperands = MI.getNumOperands();
993 Idx < NumOperands; ++Idx)
994 OpRegBankIdx[Idx] = PMI_FirstFPR;
1031 auto Idx = MRI.getRegClassOrNull(Src) == &AArch64::XSeqPairsClassRegClass
1034 OpRegBankIdx[0] = Idx;
1035 OpRegBankIdx[1] = Idx;
1066 for (unsigned Idx = 0; Idx < NumOperands; ++Idx)
1067 OpRegBankIdx[Idx] = PMI_FirstFPR;
1100 unsigned Idx = 0;
1104 OpRegBankIdx[Idx] = PMI_FirstFPR;
1105 ++Idx;
1108 Idx += MI.getNumExplicitDefs();
1113 OpRegBankIdx[Idx] = PMI_FirstFPR;
1114 ++Idx;
1128 for (unsigned Idx = 0; Idx < NumOperands; ++Idx) {
1129 if (MI.getOperand(Idx).isReg() && MI.getOperand(Idx).getReg()) {
1130 LLT Ty = MRI.getType(MI.getOperand(Idx).getReg());
1134 getValueMapping(OpRegBankIdx[Idx], TypeSize::getFixed(OpSize[Idx]));
1138 OpdsMapping[Idx] = Mapping;