Lines Matching defs:OutCC

350   MachineInstr *emitConjunction(Register Val, AArch64CC::CondCode &OutCC,
355                                           AArch64CC::CondCode OutCC,
357   MachineInstr *emitConjunctionRec(Register Val, AArch64CC::CondCode &OutCC,
4736     AArch64CC::CondCode Predicate, AArch64CC::CondCode OutCC,
4769   AArch64CC::CondCode InvOutCC = AArch64CC::getInvertedCondCode(OutCC);
4785     Register Val, AArch64CC::CondCode &OutCC, bool Negate, Register CCOp,
4798       OutCC = changeICMPPredToAArch64CC(CC);
4802       changeFPCCToANDAArch64CC(CC, OutCC, ExtraCC);
4826     return emitConditionalComparison(LHS, RHS, CC, Predicate, OutCC, MIB);
4892       LHS, OutCC, NegateL, CmpR->getOperand(0).getReg(), RHSCC, MIB);
4894     OutCC = AArch64CC::getInvertedCondCode(OutCC);
4899     Register Val, AArch64CC::CondCode &OutCC, MachineIRBuilder &MIB) const {
4905   return emitConjunctionRec(Val, OutCC, false, Register(), AArch64CC::AL, MIB);