Lines Matching defs:AndInst

135   bool tryOptAndIntoCompareBranch(MachineInstr &AndInst, bool Invert,
1621     MachineInstr &AndInst, bool Invert, MachineBasicBlock *DstMBB,
1623   assert(AndInst.getOpcode() == TargetOpcode::G_AND && "Expected G_AND only?");
1646       AndInst.getOperand(2).getReg(), *MIB.getMRI());
1654   Register TestReg = AndInst.getOperand(1).getReg();
1722   MachineInstr *AndInst = getOpcodeDef(TargetOpcode::G_AND, LHS, MRI);
1729   if (VRegAndVal && !AndInst) {
1766       AndInst = getOpcodeDef(TargetOpcode::G_AND, LHS, MRI);
1776       if (AndInst &&
1778               *AndInst, /*Invert = */ Pred == CmpInst::ICMP_NE, DestMBB, MIB)) {