Lines Matching defs:AArch64AsmParser

1 //==- AArch64AsmParser.cpp - Parse AArch64 assembly to MCInst instructions -==//
85 class AArch64AsmParser : public MCTargetAsmParser {
299   AArch64AsmParser(const MCSubtargetInfo &STI, MCAsmParser &Parser,
868     if (!AArch64AsmParser::classifySymbolRef(Expr, ELFRefKind, DarwinRefKind,
987     if (AArch64AsmParser::classifySymbolRef(Expr, ELFRefKind,
1102     if (!AArch64AsmParser::classifySymbolRef(getImm(), ELFRefKind,
2934 bool AArch64AsmParser::parseRegister(MCRegister &Reg, SMLoc &StartLoc,
2939 ParseStatus AArch64AsmParser::tryParseRegister(MCRegister &Reg, SMLoc &StartLoc,
2948 unsigned AArch64AsmParser::matchRegisterNameAlias(StringRef Name,
2997 unsigned AArch64AsmParser::getNumRegsForRegKind(RegKind K) {
3016 ParseStatus AArch64AsmParser::tryParseScalarRegister(MCRegister &RegNum) {
3032 ParseStatus AArch64AsmParser::tryParseSysCROperand(OperandVector &Operands) {
3054 ParseStatus AArch64AsmParser::tryParseRPRFMOperand(OperandVector &Operands) {
3096 ParseStatus AArch64AsmParser::tryParsePrefetch(OperandVector &Operands) {
3155 ParseStatus AArch64AsmParser::tryParsePSBHint(OperandVector &Operands) {
3171 ParseStatus AArch64AsmParser::tryParseSyspXzrPair(OperandVector &Operands) {
3197   // See also AArch64AsmParser::parseKeywordOperand.
3205 ParseStatus AArch64AsmParser::tryParseBTIHint(OperandVector &Operands) {
3223 ParseStatus AArch64AsmParser::tryParseAdrpLabel(OperandVector &Operands) {
3272 ParseStatus AArch64AsmParser::tryParseAdrLabel(OperandVector &Operands) {
3307 ParseStatus AArch64AsmParser::tryParseFPImm(OperandVector &Operands) {
3357 AArch64AsmParser::tryParseImmWithOptionalShift(OperandVector &Operands) {
3424 AArch64AsmParser::parseCondCodeString(StringRef Cond, std::string &Suggestion) {
3467 bool AArch64AsmParser::parseCondCode(OperandVector &Operands,
3495 ParseStatus AArch64AsmParser::tryParseSVCR(OperandVector &Operands) {
3515 ParseStatus AArch64AsmParser::tryParseMatrixRegister(OperandVector &Operands) {
3586 AArch64AsmParser::tryParseOptionalShiftExtend(OperandVector &Operands) {
3786 void AArch64AsmParser::createSysAlias(uint16_t Encoding, OperandVector &Operands,
3808 bool AArch64AsmParser::parseSysAlias(StringRef Name, SMLoc NameLoc,
3912 bool AArch64AsmParser::parseSyspAlias(StringRef Name, SMLoc NameLoc,
3969 ParseStatus AArch64AsmParser::tryParseBarrierOperand(OperandVector &Operands) {
4032 AArch64AsmParser::tryParseBarriernXSOperand(OperandVector &Operands) {
4077 ParseStatus AArch64AsmParser::tryParseSysReg(OperandVector &Operands) {
4113 bool AArch64AsmParser::tryParseNeonVectorRegister(OperandVector &Operands) {
4142 ParseStatus AArch64AsmParser::tryParseVectorIndex(OperandVector &Operands) {
4168 ParseStatus AArch64AsmParser::tryParseVectorRegister(MCRegister &Reg,
4198 ParseStatus AArch64AsmParser::tryParseSVEPredicateOrPredicateAsCounterVector(
4210 AArch64AsmParser::tryParseSVEPredicateVector(OperandVector &Operands) {
4271 bool AArch64AsmParser::parseRegister(OperandVector &Operands) {
4286 bool AArch64AsmParser::parseSymbolicImmVal(const MCExpr *&ImmVal) {
4364 ParseStatus AArch64AsmParser::tryParseMatrixTileList(OperandVector &Operands) {
4471 ParseStatus AArch64AsmParser::tryParseVectorList(OperandVector &Operands,
4595 bool AArch64AsmParser::parseNeonVectorList(OperandVector &Operands) {
4603 ParseStatus AArch64AsmParser::tryParseGPR64sp0Operand(OperandVector &Operands) {
4632 ParseStatus AArch64AsmParser::tryParseZTOperand(OperandVector &Operands) {
4671 ParseStatus AArch64AsmParser::tryParseGPROperand(OperandVector &Operands) {
4704 bool AArch64AsmParser::parseOptionalMulOperand(OperandVector &Operands) {
4746 bool AArch64AsmParser::parseOptionalVGOperand(OperandVector &Operands,
4766 bool AArch64AsmParser::parseKeywordOperand(OperandVector &Operands) {
4785 bool AArch64AsmParser::parseOperand(OperandVector &Operands, bool isCondCode,
4996 bool AArch64AsmParser::parseImmExpr(int64_t &Out) {
5008 bool AArch64AsmParser::parseComma() {
5016 bool AArch64AsmParser::parseRegisterInRange(unsigned &Out, unsigned Base,
5055 bool AArch64AsmParser::areEqualRegs(const MCParsedAsmOperand &Op1,
5090 bool AArch64AsmParser::ParseInstruction(ParseInstructionInfo &Info,
5250 bool AArch64AsmParser::validateInstruction(MCInst &Inst, SMLoc &IDLoc,
5743 bool AArch64AsmParser::showMatchError(SMLoc Loc, unsigned ErrCode,
6207 bool AArch64AsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
6801 bool AArch64AsmParser::ParseDirective(AsmToken DirectiveID) {
6951 bool AArch64AsmParser::parseDirectiveArch(SMLoc L) {
7006 bool AArch64AsmParser::parseDirectiveArchExtension(SMLoc L) {
7046 bool AArch64AsmParser::parseDirectiveCPU(SMLoc L) {
7106 bool AArch64AsmParser::parseDirectiveInst(SMLoc Loc) {
7127 bool AArch64AsmParser::parseDirectiveTLSDescCall(SMLoc L) {
7147 bool AArch64AsmParser::parseDirectiveLOH(StringRef IDVal, SMLoc Loc) {
7196 bool AArch64AsmParser::parseDirectiveLtorg(SMLoc L) {
7205 bool AArch64AsmParser::parseDirectiveReq(StringRef Name, SMLoc L) {
7267 bool AArch64AsmParser::parseDirectiveUnreq(SMLoc L) {
7275 bool AArch64AsmParser::parseDirectiveCFINegateRAState() {
7284 bool AArch64AsmParser::parseDirectiveCFIBKeyFrame() {
7293 bool AArch64AsmParser::parseDirectiveCFIMTETaggedFrame() {
7302 bool AArch64AsmParser::parseDirectiveVariantPCS(SMLoc L) {
7315 bool AArch64AsmParser::parseDirectiveSEHAllocStack(SMLoc L) {
7325 bool AArch64AsmParser::parseDirectiveSEHPrologEnd(SMLoc L) {
7332 bool AArch64AsmParser::parseDirectiveSEHSaveR19R20X(SMLoc L) {
7342 bool AArch64AsmParser::parseDirectiveSEHSaveFPLR(SMLoc L) {
7352 bool AArch64AsmParser::parseDirectiveSEHSaveFPLRX(SMLoc L) {
7362 bool AArch64AsmParser::parseDirectiveSEHSaveReg(SMLoc L) {
7374 bool AArch64AsmParser::parseDirectiveSEHSaveRegX(SMLoc L) {
7386 bool AArch64AsmParser::parseDirectiveSEHSaveRegP(SMLoc L) {
7398 bool AArch64AsmParser::parseDirectiveSEHSaveRegPX(SMLoc L) {
7410 bool AArch64AsmParser::parseDirectiveSEHSaveLRPair(SMLoc L) {
7426 bool AArch64AsmParser::parseDirectiveSEHSaveFReg(SMLoc L) {
7438 bool AArch64AsmParser::parseDirectiveSEHSaveFRegX(SMLoc L) {
7450 bool AArch64AsmParser::parseDirectiveSEHSaveFRegP(SMLoc L) {
7462 bool AArch64AsmParser::parseDirectiveSEHSaveFRegPX(SMLoc L) {
7474 bool AArch64AsmParser::parseDirectiveSEHSetFP(SMLoc L) {
7481 bool AArch64AsmParser::parseDirectiveSEHAddFP(SMLoc L) {
7491 bool AArch64AsmParser::parseDirectiveSEHNop(SMLoc L) {
7498 bool AArch64AsmParser::parseDirectiveSEHSaveNext(SMLoc L) {
7505 bool AArch64AsmParser::parseDirectiveSEHEpilogStart(SMLoc L) {
7512 bool AArch64AsmParser::parseDirectiveSEHEpilogEnd(SMLoc L) {
7519 bool AArch64AsmParser::parseDirectiveSEHTrapFrame(SMLoc L) {
7526 bool AArch64AsmParser::parseDirectiveSEHMachineFrame(SMLoc L) {
7533 bool AArch64AsmParser::parseDirectiveSEHContext(SMLoc L) {
7540 bool AArch64AsmParser::parseDirectiveSEHECContext(SMLoc L) {
7547 bool AArch64AsmParser::parseDirectiveSEHClearUnwoundToCall(SMLoc L) {
7554 bool AArch64AsmParser::parseDirectiveSEHPACSignLR(SMLoc L) {
7564 bool AArch64AsmParser::parseDirectiveSEHSaveAnyReg(SMLoc L, bool Paired,
7637 bool AArch64AsmParser::parsePrimaryExpr(const MCExpr *&Res, SMLoc &EndLoc) {
7648 bool AArch64AsmParser::parseAuthExpr(const MCExpr *&Res, SMLoc &EndLoc) {
7744 AArch64AsmParser::classifySymbolRef(const MCExpr *Expr,
7787   RegisterMCAsmParser<AArch64AsmParser> X(getTheAArch64leTarget());
7788   RegisterMCAsmParser<AArch64AsmParser> Y(getTheAArch64beTarget());
7789   RegisterMCAsmParser<AArch64AsmParser> Z(getTheARM64Target());
7790   RegisterMCAsmParser<AArch64AsmParser> W(getTheARM64_32Target());
7791   RegisterMCAsmParser<AArch64AsmParser> V(getTheAArch64_32Target());
7802 unsigned AArch64AsmParser::validateTargetOperandClass(MCParsedAsmOperand &AsmOp,
7871 ParseStatus AArch64AsmParser::tryParseGPRSeqPair(OperandVector &Operands) {
7936 ParseStatus AArch64AsmParser::tryParseSVEDataVector(OperandVector &Operands) {
7986 ParseStatus AArch64AsmParser::tryParseSVEPattern(OperandVector &Operands) {
8030 AArch64AsmParser::tryParseSVEVecLenSpecifier(OperandVector &Operands) {
8051 ParseStatus AArch64AsmParser::tryParseGPR64x8(OperandVector &Operands) {
8072 ParseStatus AArch64AsmParser::tryParseImmRange(OperandVector &Operands) {