Lines Matching defs:Imm1
206 T &Imm1) -> std::optional<OpcodePair> {
207 if (splitBitmaskImm(Imm, RegSize, Imm0, Imm1))
212 unsigned Imm1, Register SrcReg, Register NewTmpReg,
221 .addImm(Imm1);
332 static bool splitAddSubImm(T Imm, unsigned RegSize, T &Imm0, T &Imm1) {
345 // Split Imm into (Imm0 << 12) + Imm1;
347 Imm1 = Imm & 0xfff;
377 T &Imm1) -> std::optional<OpcodePair> {
378 if (splitAddSubImm(Imm, RegSize, Imm0, Imm1))
380 if (splitAddSubImm(-Imm, RegSize, Imm0, Imm1))
385 unsigned Imm1, Register SrcReg, Register NewTmpReg,
395 .addImm(Imm1)
414 T &Imm1) -> std::optional<OpcodePair> {
416 if (splitAddSubImm(Imm, RegSize, Imm0, Imm1))
418 else if (splitAddSubImm(-Imm, RegSize, Imm0, Imm1))
431 unsigned Imm1, Register SrcReg, Register NewTmpReg,
441 .addImm(Imm1)
499 // Split the immediate to Imm0 and Imm1, and calculate the Opcode.
500 T Imm = static_cast<T>(MovMI->getOperand(1).getImm()), Imm0, Imm1;
508 if (auto R = SplitAndOpc(Imm, RegSize, Imm0, Imm1))
516 // NewDstReg = Opcode.second NewTmpReg Imm1
550 BuildInstr(MI, Opcode, Imm0, Imm1, SrcReg, NewTmpReg, NewDstReg);