Lines Matching defs:KillSrc

4402                                         MCRegister SrcReg, bool KillSrc,
4422     AddSubReg(MIB, SrcReg, Indices[SubReg], getKillRegState(KillSrc), TRI);
4429                                        unsigned SrcReg, bool KillSrc,
4446     AddSubReg(MIB, SrcReg, Indices[SubReg], getKillRegState(KillSrc), TRI);
4454                                    MCRegister SrcReg, bool KillSrc) const {
4475             .addReg(SrcReg, RegState::Implicit | getKillRegState(KillSrc));
4478             .addReg(SrcReg, getKillRegState(KillSrc))
4500             .addReg(SrcReg, RegState::Implicit | getKillRegState(KillSrc));
4505             .addReg(SrcReg, getKillRegState(KillSrc));
4519       .addReg(SrcReg, getKillRegState(KillSrc));
4538                        .addReg(PPRSrcReg, getKillRegState(KillSrc));
4552       .addReg(SrcReg, getKillRegState(KillSrc));
4564     copyPhysRegTuple(MBB, I, DL, DestReg, SrcReg, KillSrc, AArch64::ORR_ZZZ,
4576     copyPhysRegTuple(MBB, I, DL, DestReg, SrcReg, KillSrc, AArch64::ORR_ZZZ,
4590     copyPhysRegTuple(MBB, I, DL, DestReg, SrcReg, KillSrc, AArch64::ORR_ZZZ,
4600           .addReg(SrcReg, getKillRegState(KillSrc))
4611           .addReg(SrcReg, getKillRegState(KillSrc));
4621     copyPhysRegTuple(MBB, I, DL, DestReg, SrcReg, KillSrc, AArch64::ORRv8i8,
4631     copyPhysRegTuple(MBB, I, DL, DestReg, SrcReg, KillSrc, AArch64::ORRv8i8,
4640     copyPhysRegTuple(MBB, I, DL, DestReg, SrcReg, KillSrc, AArch64::ORRv8i8,
4650     copyPhysRegTuple(MBB, I, DL, DestReg, SrcReg, KillSrc, AArch64::ORRv16i8,
4660     copyPhysRegTuple(MBB, I, DL, DestReg, SrcReg, KillSrc, AArch64::ORRv16i8,
4669     copyPhysRegTuple(MBB, I, DL, DestReg, SrcReg, KillSrc, AArch64::ORRv16i8,
4677     copyGPRRegTuple(MBB, I, DL, DestReg, SrcReg, KillSrc, AArch64::ORRXrs,
4685     copyGPRRegTuple(MBB, I, DL, DestReg, SrcReg, KillSrc, AArch64::ORRWrs,
4701           .addReg(SrcReg, getKillRegState(KillSrc));
4705           .addReg(SrcReg, getKillRegState(KillSrc))
4720         .addReg(SrcReg, getKillRegState(KillSrc));
4727         .addReg(SrcReg, getKillRegState(KillSrc));
4738         .addReg(SrcReg, getKillRegState(KillSrc));
4749         .addReg(SrcReg, getKillRegState(KillSrc));
4757         .addReg(SrcReg, getKillRegState(KillSrc));
4763         .addReg(SrcReg, getKillRegState(KillSrc));
4770         .addReg(SrcReg, getKillRegState(KillSrc));
4776         .addReg(SrcReg, getKillRegState(KillSrc));
4784         .addReg(SrcReg, getKillRegState(KillSrc))
4793         .addReg(AArch64::NZCV, RegState::Implicit | getKillRegState(KillSrc));