Lines Matching defs:WhichResult

12541 static bool isZIP_v_undef_Mask(ArrayRef<int> M, EVT VT, unsigned &WhichResult) {
12545   WhichResult = (M[0] == 0 ? 0 : 1);
12546   unsigned Idx = WhichResult * NumElts / 2;
12560 static bool isUZP_v_undef_Mask(ArrayRef<int> M, EVT VT, unsigned &WhichResult) {
12562   WhichResult = (M[0] == 0 ? 0 : 1);
12564     unsigned Idx = WhichResult;
12579 static bool isTRN_v_undef_Mask(ArrayRef<int> M, EVT VT, unsigned &WhichResult) {
12583   WhichResult = (M[0] == 0 ? 0 : 1);
12585     if ((M[i] >= 0 && (unsigned)M[i] != i + WhichResult) ||
12586         (M[i + 1] >= 0 && (unsigned)M[i + 1] != i + WhichResult))
13232   unsigned WhichResult;
13233   if (isZIPMask(ShuffleMask, NumElts, WhichResult)) {
13234     unsigned Opc = (WhichResult == 0) ? AArch64ISD::ZIP1 : AArch64ISD::ZIP2;
13237   if (isUZPMask(ShuffleMask, NumElts, WhichResult)) {
13238     unsigned Opc = (WhichResult == 0) ? AArch64ISD::UZP1 : AArch64ISD::UZP2;
13241   if (isTRNMask(ShuffleMask, NumElts, WhichResult)) {
13242     unsigned Opc = (WhichResult == 0) ? AArch64ISD::TRN1 : AArch64ISD::TRN2;
13246   if (isZIP_v_undef_Mask(ShuffleMask, VT, WhichResult)) {
13247     unsigned Opc = (WhichResult == 0) ? AArch64ISD::ZIP1 : AArch64ISD::ZIP2;
13250   if (isUZP_v_undef_Mask(ShuffleMask, VT, WhichResult)) {
13251     unsigned Opc = (WhichResult == 0) ? AArch64ISD::UZP1 : AArch64ISD::UZP2;
13254   if (isTRN_v_undef_Mask(ShuffleMask, VT, WhichResult)) {
13255     unsigned Opc = (WhichResult == 0) ? AArch64ISD::TRN1 : AArch64ISD::TRN2;
28254   unsigned WhichResult;
28255   if (isZIPMask(ShuffleMask, VT.getVectorNumElements(), WhichResult) &&
28256       WhichResult == 0)
28260   if (isTRNMask(ShuffleMask, VT.getVectorNumElements(), WhichResult)) {
28261     unsigned Opc = (WhichResult == 0) ? AArch64ISD::TRN1 : AArch64ISD::TRN2;
28266   if (isZIP_v_undef_Mask(ShuffleMask, VT, WhichResult) && WhichResult == 0)
28270   if (isTRN_v_undef_Mask(ShuffleMask, VT, WhichResult)) {
28271     unsigned Opc = (WhichResult == 0) ? AArch64ISD::TRN1 : AArch64ISD::TRN2;
28303     if (isZIPMask(ShuffleMask, VT.getVectorNumElements(), WhichResult) &&
28304         WhichResult != 0)
28308     if (isUZPMask(ShuffleMask, VT.getVectorNumElements(), WhichResult)) {
28309       unsigned Opc = (WhichResult == 0) ? AArch64ISD::UZP1 : AArch64ISD::UZP2;
28314     if (isZIP_v_undef_Mask(ShuffleMask, VT, WhichResult) && WhichResult != 0)
28318     if (isUZP_v_undef_Mask(ShuffleMask, VT, WhichResult)) {
28319       unsigned Opc = (WhichResult == 0) ? AArch64ISD::UZP1 : AArch64ISD::UZP2;