Lines Matching defs:RMW
14354 // a) Avoid a RMW dependency on the full vector register, and
26129 // LSE128 has a 128-bit RMW ops, but i128 is not a legal type, so lower it
26460 if (const auto *RMW = dyn_cast<AtomicRMWInst>(I))
26461 return RMW->getValOperand()->getType()->getPrimitiveSizeInBits() == 128 &&
26462 RMW->getAlign() >= Align(16) &&
26463 (RMW->getOperation() == AtomicRMWInst::Xchg ||
26464 RMW->getOperation() == AtomicRMWInst::And ||
26465 RMW->getOperation() == AtomicRMWInst::Or);
26568 // The "default" for integer RMW operations is to expand to an LL/SC loop.