Lines Matching defs:NewVT
4391 MVT NewVT = MVT::getVectorVT(MVT::f32, NumElts);
4394 SDValue Ext = DAG.getNode(ISD::STRICT_FP_EXTEND, dl, {NewVT, MVT::Other},
4401 DAG.getNode(ISD::FP_EXTEND, dl, NewVT, Op.getOperand(0)));
4978 EVT NewVT = getExtensionTo64Bits(OrigTy);
4980 return DAG.getNode(ExtOpcode, SDLoc(N), NewVT, N);
6073 EVT NewVT = getTypeToTransformTo(*DAG.getContext(), VT);
6074 SDValue Mask = DAG.getNode(ISD::SIGN_EXTEND, dl, NewVT, CttzOp);
13059 MVT NewVT = MVT::getVectorVT(NewEltVT, VT.getVectorNumElements() / 2);
13060 if (DAG.getTargetLoweringInfo().isTypeLegal(NewVT)) {
13061 V0 = DAG.getBitcast(NewVT, V0);
13062 V1 = DAG.getBitcast(NewVT, V1);
13064 DAG.getVectorShuffle(NewVT, DL, V0, V1, NewMask));
15694 EVT NewVT) const {
15696 if (!TargetLoweringBase::shouldReduceLoadWidth(Load, ExtTy, NewVT))
19692 MVT NewVT = MVT::getVectorVT(ElementTy, NumElems * 2);
19693 N = DAG.getNode(N->getOpcode(), DL, NewVT, N->ops());
22669 MVT NewVT =
22680 NewVT, DL, Chain, NewPtr, LD->getPointerInfo().getWithOffset(PtrOffset),
22702 SDValue UndefVector = DAG.getUNDEF(NewVT);
22705 DAG.getNode(ISD::INSERT_SUBVECTOR, DL, NewVT,
22711 LoadOps.size() * NewVT.getVectorNumElements());
26375 EVT NewVT = getTypeToTransformTo(*DAG.getContext(), VT);
26376 if (NewVT.getVectorNumElements() != VT.getVectorNumElements())
26380 auto V = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, DL, NewVT, N->ops());
28225 EVT NewVT =
28235 Op = DAG.getNode(ISD::BITCAST, DL, NewVT, Op1);
28247 EVT NewVT = getPackedSVEVectorVT(EVT::getIntegerVT(*DAG.getContext(), 64));
28248 Op = DAG.getNode(ISD::BITCAST, DL, NewVT, Op1);
28670 EVT NewVT = EVT::getVectorVT(Context, EltTy, ElementCount::getFixed(1));
28671 if (!isTypeLegal(NewVT))
28672 NewVT = EltTy;
28674 IntermediateVT = NewVT;
28676 RegisterVT = getRegisterType(Context, NewVT);