Lines Matching defs:NVCAST

2720     MAKE_CASE(AArch64ISD::NVCAST)
10241   return DAG.getNode(AArch64ISD::NVCAST, DL, VT,
12273           DAG.getNode(AArch64ISD::NVCAST, dl, ShuffleVT, Src.ShuffleVec);
12330     V = DAG.getNode(AArch64ISD::NVCAST, dl, VT, Shuffle);
13426       return DAG.getNode(AArch64ISD::NVCAST, dl, VT, Mov);
13471                           DAG.getNode(AArch64ISD::NVCAST, dl, MovTy, *LHS),
13479       return DAG.getNode(AArch64ISD::NVCAST, dl, VT, Mov);
13516                           DAG.getNode(AArch64ISD::NVCAST, dl, MovTy, *LHS),
13524       return DAG.getNode(AArch64ISD::NVCAST, dl, VT, Mov);
13555       return DAG.getNode(AArch64ISD::NVCAST, dl, VT, Mov);
13576       return DAG.getNode(AArch64ISD::NVCAST, dl, VT, Mov);
13607       return DAG.getNode(AArch64ISD::NVCAST, dl, VT, Mov);
13925             AArch64ISD::NVCAST, DL, VT,
13927                         DAG.getNode(AArch64ISD::NVCAST, DL, VFVT, NewOp)));
17909     return DAG.getNode(AArch64ISD::NVCAST, SDLoc(A), MVT::v8i16, Uaddlv);
18197   SDValue In = DAG.getNode(AArch64ISD::NVCAST, DL, HalfVT, Srl.getOperand(0));
18199   return DAG.getNode(AArch64ISD::NVCAST, DL, VT, CM);
24383   if (N->getOperand(0).getOpcode() == AArch64ISD::NVCAST)
24384     return DAG.getNode(AArch64ISD::NVCAST, SDLoc(N), N->getValueType(0),
25218   //  t40: v1i64 = AArch64ISD::NVCAST t39
25244   // Let's generate new sequence with AArch64ISD::NVCAST.
25249   SDValue NVCAST =
25250       DAG.getNode(AArch64ISD::NVCAST, DL, MVT::v1i64, EXTRACT_SUBVEC);
25252   return NVCAST;
25365   case AArch64ISD::NVCAST: