Lines Matching defs:Intrinsic
1497 Disc->getConstantOperandVal(0) == Intrinsic::ptrauth_blend) {
1867 SDNode *Intrinsic = CurDAG->getMachineNode(Opcode, DL, MVT::Untyped, Ops);
1868 SDValue SuperReg = SDValue(Intrinsic, 0);
1901 SDNode *Intrinsic;
1903 Intrinsic = CurDAG->getMachineNode(Opcode, DL, MVT::Untyped,
1906 Intrinsic = CurDAG->getMachineNode(Opcode, DL, MVT::Untyped, Zdn, Zm);
1907 SDValue SuperReg = SDValue(Intrinsic, 0);
2030 SDNode *Intrinsic = CurDAG->getMachineNode(Op, DL, MVT::Untyped, Ops);
2031 SDValue SuperReg = SDValue(Intrinsic, 0);
4377 IRG_SP->getConstantOperandVal(1) != Intrinsic::aarch64_irg_sp) {
4683 case Intrinsic::aarch64_gcsss: {
4695 case Intrinsic::aarch64_ldaxp:
4696 case Intrinsic::aarch64_ldxp: {
4698 IntNo == Intrinsic::aarch64_ldaxp ? AArch64::LDAXPX : AArch64::LDXPX;
4713 case Intrinsic::aarch64_stlxp:
4714 case Intrinsic::aarch64_stxp: {
4716 IntNo == Intrinsic::aarch64_stlxp ? AArch64::STLXPX : AArch64::STXPX;
4735 case Intrinsic::aarch64_neon_ld1x2:
4762 case Intrinsic::aarch64_neon_ld1x3:
4789 case Intrinsic::aarch64_neon_ld1x4:
4816 case Intrinsic::aarch64_neon_ld2:
4843 case Intrinsic::aarch64_neon_ld3:
4870 case Intrinsic::aarch64_neon_ld4:
4897 case Intrinsic::aarch64_neon_ld2r:
4924 case Intrinsic::aarch64_neon_ld3r:
4951 case Intrinsic::aarch64_neon_ld4r:
4978 case Intrinsic::aarch64_neon_ld2lane:
4996 case Intrinsic::aarch64_neon_ld3lane:
5014 case Intrinsic::aarch64_neon_ld4lane:
5032 case Intrinsic::aarch64_ld64b:
5035 case Intrinsic::aarch64_sve_ld2q_sret: {
5039 case Intrinsic::aarch64_sve_ld3q_sret: {
5043 case Intrinsic::aarch64_sve_ld4q_sret: {
5047 case Intrinsic::aarch64_sve_ld2_sret: {
5068 case Intrinsic::aarch64_sve_ld1_pn_x2: {
5113 case Intrinsic::aarch64_sve_ld1_pn_x4: {
5158 case Intrinsic::aarch64_sve_ldnt1_pn_x2: {
5207 case Intrinsic::aarch64_sve_ldnt1_pn_x4: {
5256 case Intrinsic::aarch64_sve_ld3_sret: {
5277 case Intrinsic::aarch64_sve_ld4_sret: {
5298 case Intrinsic::aarch64_sme_read_hor_vg2: {
5319 case Intrinsic::aarch64_sme_read_ver_vg2: {
5340 case Intrinsic::aarch64_sme_read_hor_vg4: {
5361 case Intrinsic::aarch64_sme_read_ver_vg4: {
5382 case Intrinsic::aarch64_sme_read_vg1x2: {
5387 case Intrinsic::aarch64_sme_read_vg1x4: {
5392 case Intrinsic::aarch64_sme_readz_horiz_x2: {
5409 case Intrinsic::aarch64_sme_readz_vert_x2: {
5426 case Intrinsic::aarch64_sme_readz_horiz_x4: {
5443 case Intrinsic::aarch64_sme_readz_vert_x4: {
5460 case Intrinsic::aarch64_sme_readz_x2: {
5465 case Intrinsic::aarch64_sme_readz_x4: {
5470 case Intrinsic::swift_async_context_addr: {
5488 case Intrinsic::aarch64_sme_luti2_lane_zt_x4: {
5497 case Intrinsic::aarch64_sme_luti4_lane_zt_x4: {
5505 case Intrinsic::aarch64_sme_luti2_lane_zt_x2: {
5514 case Intrinsic::aarch64_sme_luti4_lane_zt_x2: {
5530 case Intrinsic::aarch64_tagp:
5534 case Intrinsic::ptrauth_auth:
5538 case Intrinsic::ptrauth_resign:
5542 case Intrinsic::aarch64_neon_tbl2:
5547 case Intrinsic::aarch64_neon_tbl3:
5552 case Intrinsic::aarch64_neon_tbl4:
5557 case Intrinsic::aarch64_neon_tbx2:
5562 case Intrinsic::aarch64_neon_tbx3:
5567 case Intrinsic::aarch64_neon_tbx4:
5572 case Intrinsic::aarch64_sve_srshl_single_x2:
5579 case Intrinsic::aarch64_sve_srshl_single_x4:
5586 case Intrinsic::aarch64_sve_urshl_single_x2:
5593 case Intrinsic::aarch64_sve_urshl_single_x4:
5600 case Intrinsic::aarch64_sve_srshl_x2:
5607 case Intrinsic::aarch64_sve_srshl_x4:
5614 case Intrinsic::aarch64_sve_urshl_x2:
5621 case Intrinsic::aarch64_sve_urshl_x4:
5628 case Intrinsic::aarch64_sve_sqdmulh_single_vgx2:
5635 case Intrinsic::aarch64_sve_sqdmulh_single_vgx4:
5642 case Intrinsic::aarch64_sve_sqdmulh_vgx2:
5649 case Intrinsic::aarch64_sve_sqdmulh_vgx4:
5656 case Intrinsic::aarch64_sve_whilege_x2:
5663 case Intrinsic::aarch64_sve_whilegt_x2:
5670 case Intrinsic::aarch64_sve_whilehi_x2:
5677 case Intrinsic::aarch64_sve_whilehs_x2:
5684 case Intrinsic::aarch64_sve_whilele_x2:
5691 case Intrinsic::aarch64_sve_whilelo_x2:
5698 case Intrinsic::aarch64_sve_whilels_x2:
5705 case Intrinsic::aarch64_sve_whilelt_x2:
5712 case Intrinsic::aarch64_sve_smax_single_x2:
5719 case Intrinsic::aarch64_sve_umax_single_x2:
5726 case Intrinsic::aarch64_sve_fmax_single_x2:
5733 case Intrinsic::aarch64_sve_smax_single_x4:
5740 case Intrinsic::aarch64_sve_umax_single_x4:
5747 case Intrinsic::aarch64_sve_fmax_single_x4:
5754 case Intrinsic::aarch64_sve_smin_single_x2:
5761 case Intrinsic::aarch64_sve_umin_single_x2:
5768 case Intrinsic::aarch64_sve_fmin_single_x2:
5775 case Intrinsic::aarch64_sve_smin_single_x4:
5782 case Intrinsic::aarch64_sve_umin_single_x4:
5789 case Intrinsic::aarch64_sve_fmin_single_x4:
5796 case Intrinsic::aarch64_sve_smax_x2:
5803 case Intrinsic::aarch64_sve_umax_x2:
5810 case Intrinsic::aarch64_sve_fmax_x2:
5817 case Intrinsic::aarch64_sve_smax_x4:
5824 case Intrinsic::aarch64_sve_umax_x4:
5831 case Intrinsic::aarch64_sve_fmax_x4:
5838 case Intrinsic::aarch64_sve_smin_x2:
5845 case Intrinsic::aarch64_sve_umin_x2:
5852 case Intrinsic::aarch64_sve_fmin_x2:
5859 case Intrinsic::aarch64_sve_smin_x4:
5866 case Intrinsic::aarch64_sve_umin_x4:
5873 case Intrinsic::aarch64_sve_fmin_x4:
5880 case Intrinsic::aarch64_sve_fmaxnm_single_x2 :
5887 case Intrinsic::aarch64_sve_fmaxnm_single_x4 :
5894 case Intrinsic::aarch64_sve_fminnm_single_x2:
5901 case Intrinsic::aarch64_sve_fminnm_single_x4:
5908 case Intrinsic::aarch64_sve_fmaxnm_x2:
5915 case Intrinsic::aarch64_sve_fmaxnm_x4:
5922 case Intrinsic::aarch64_sve_fminnm_x2:
5929 case Intrinsic::aarch64_sve_fminnm_x4:
5936 case Intrinsic::aarch64_sve_fcvtzs_x2:
5939 case Intrinsic::aarch64_sve_scvtf_x2:
5942 case Intrinsic::aarch64_sve_fcvtzu_x2:
5945 case Intrinsic::aarch64_sve_ucvtf_x2:
5948 case Intrinsic::aarch64_sve_fcvtzs_x4:
5951 case Intrinsic::aarch64_sve_scvtf_x4:
5954 case Intrinsic::aarch64_sve_fcvtzu_x4:
5957 case Intrinsic::aarch64_sve_ucvtf_x4:
5960 case Intrinsic::aarch64_sve_fcvt_widen_x2:
5963 case Intrinsic::aarch64_sve_fcvtl_widen_x2:
5966 case Intrinsic::aarch64_sve_sclamp_single_x2:
5973 case Intrinsic::aarch64_sve_uclamp_single_x2:
5980 case Intrinsic::aarch64_sve_fclamp_single_x2:
5987 case Intrinsic::aarch64_sve_bfclamp_single_x2:
5990 case Intrinsic::aarch64_sve_sclamp_single_x4:
5997 case Intrinsic::aarch64_sve_uclamp_single_x4:
6004 case Intrinsic::aarch64_sve_fclamp_single_x4:
6011 case Intrinsic::aarch64_sve_bfclamp_single_x4:
6014 case Intrinsic::aarch64_sve_add_single_x2:
6021 case Intrinsic::aarch64_sve_add_single_x4:
6028 case Intrinsic::aarch64_sve_zip_x2:
6035 case Intrinsic::aarch64_sve_zipq_x2:
6039 case Intrinsic::aarch64_sve_zip_x4:
6046 case Intrinsic::aarch64_sve_zipq_x4:
6050 case Intrinsic::aarch64_sve_uzp_x2:
6057 case Intrinsic::aarch64_sve_uzpq_x2:
6061 case Intrinsic::aarch64_sve_uzp_x4:
6068 case Intrinsic::aarch64_sve_uzpq_x4:
6072 case Intrinsic::aarch64_sve_sel_x2:
6079 case Intrinsic::aarch64_sve_sel_x4:
6086 case Intrinsic::aarch64_sve_frinta_x2:
6089 case Intrinsic::aarch64_sve_frinta_x4:
6092 case Intrinsic::aarch64_sve_frintm_x2:
6095 case Intrinsic::aarch64_sve_frintm_x4:
6098 case Intrinsic::aarch64_sve_frintn_x2:
6101 case Intrinsic::aarch64_sve_frintn_x4:
6104 case Intrinsic::aarch64_sve_frintp_x2:
6107 case Intrinsic::aarch64_sve_frintp_x4:
6110 case Intrinsic::aarch64_sve_sunpk_x2:
6117 case Intrinsic::aarch64_sve_uunpk_x2:
6124 case Intrinsic::aarch64_sve_sunpk_x4:
6131 case Intrinsic::aarch64_sve_uunpk_x4:
6138 case Intrinsic::aarch64_sve_pext_x2: {
6156 case Intrinsic::aarch64_neon_st1x2: {
6186 case Intrinsic::aarch64_neon_st1x3: {
6216 case Intrinsic::aarch64_neon_st1x4: {
6246 case Intrinsic::aarch64_neon_st2: {
6276 case Intrinsic::aarch64_neon_st3: {
6306 case Intrinsic::aarch64_neon_st4: {
6336 case Intrinsic::aarch64_neon_st2lane: {
6355 case Intrinsic::aarch64_neon_st3lane: {
6374 case Intrinsic::aarch64_neon_st4lane: {
6393 case Intrinsic::aarch64_sve_st2q: {
6397 case Intrinsic::aarch64_sve_st3q: {
6401 case Intrinsic::aarch64_sve_st4q: {
6405 case Intrinsic::aarch64_sve_st2: {
6422 case Intrinsic::aarch64_sve_st3: {
6439 case Intrinsic::aarch64_sve_st4: {
7177 case Intrinsic::aarch64_sme_ldr:
7178 case Intrinsic::aarch64_sme_str:
7180 case Intrinsic::aarch64_sve_prf:
7185 case Intrinsic::aarch64_sve_ld2_sret:
7186 case Intrinsic::aarch64_sve_ld2q_sret:
7189 case Intrinsic::aarch64_sve_st2q:
7192 case Intrinsic::aarch64_sve_ld3_sret:
7193 case Intrinsic::aarch64_sve_ld3q_sret:
7196 case Intrinsic::aarch64_sve_st3q:
7199 case Intrinsic::aarch64_sve_ld4_sret:
7200 case Intrinsic::aarch64_sve_ld4q_sret:
7203 case Intrinsic::aarch64_sve_st4q:
7206 case Intrinsic::aarch64_sve_ld1udq:
7207 case Intrinsic::aarch64_sve_st1dq:
7209 case Intrinsic::aarch64_sve_ld1uwq:
7210 case Intrinsic::aarch64_sve_st1wq: