Lines Matching defs:WantResult
206 bool WantResult = true, bool IsZExt = false);
209 bool WantResult = true);
212 bool WantResult = true);
216 bool WantResult = true);
220 bool WantResult = true);
237 bool SetFlags = false, bool WantResult = true,
241 bool SetFlags = false, bool WantResult = true,
244 bool WantResult = true);
247 bool WantResult = true);
1167 bool WantResult, bool IsZExt) {
1221 WantResult);
1224 WantResult);
1227 ResultReg = emitAddSub_ri(UseAdd, RetVT, LHSReg, 0, SetFlags, WantResult);
1239 SetFlags, WantResult);
1258 ShiftVal, SetFlags, WantResult);
1281 ShiftVal, SetFlags, WantResult);
1296 return emitAddSub_rr(UseAdd, RetVT, LHSReg, RHSReg, SetFlags, WantResult);
1301 bool WantResult) {
1322 if (WantResult)
1338 bool WantResult) {
1367 if (WantResult)
1385 bool WantResult) {
1408 if (WantResult)
1427 bool WantResult) {
1452 if (WantResult)
1491 return emitSub(RetVT, LHS, RHS, /*SetFlags=*/true, /*WantResult=*/false,
1497 /*SetFlags=*/true, /*WantResult=*/false) != 0;
1534 bool SetFlags, bool WantResult, bool IsZExt) {
1535 return emitAddSub(/*UseAdd=*/true, RetVT, LHS, RHS, SetFlags, WantResult,
1563 bool SetFlags, bool WantResult, bool IsZExt) {
1564 return emitAddSub(/*UseAdd=*/false, RetVT, LHS, RHS, SetFlags, WantResult,
1569 unsigned RHSReg, bool WantResult) {
1571 /*SetFlags=*/true, WantResult);
1577 uint64_t ShiftImm, bool WantResult) {
1579 ShiftImm, /*SetFlags=*/true, WantResult);
3729 /*WantResult=*/false);
3738 /*WantResult=*/false);
3766 emitSubs_rr(VT, AArch64::XZR, UMULHReg, /*WantResult=*/false);