Lines Matching defs:Src0Reg

4635   Register Src0Reg = getRegForValue(I->getOperand(0));
4636   if (!Src0Reg)
4645   Register QuotReg = fastEmitInst_rr(DivOpc, RC, Src0Reg, Src1Reg);
4649   Register ResultReg = fastEmitInst_rrr(MSubOpc, RC, QuotReg, Src1Reg, Src0Reg);
4694       Register Src0Reg = getRegForValue(Src0);
4695       if (!Src0Reg)
4699           emitLSL_ri(VT, SrcVT, Src0Reg, ShiftVal, IsZExt);
4707   Register Src0Reg = getRegForValue(I->getOperand(0));
4708   if (!Src0Reg)
4715   unsigned ResultReg = emitMul_rr(VT, Src0Reg, Src1Reg);
4902   Register Src0Reg = getRegForValue(I->getOperand(0));
4903   if (!Src0Reg)
4907     unsigned ResultReg = emitASR_ri(VT, VT, Src0Reg, Lg2);
4915   unsigned AddReg = emitAdd_ri_(VT, Src0Reg, Pow2MinusOne);
4920   if (!emitICmp_ri(VT, Src0Reg, 0))
4932   Register SelectReg = fastEmitInst_rri(SelectOpc, RC, AddReg, Src0Reg,