Lines Matching refs:MBBI
65 bool expandMI(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
68 MachineBasicBlock::iterator MBBI,
72 bool expandMOVImm(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
76 MachineBasicBlock::iterator MBBI);
77 bool expandCMP_SWAP(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
82 MachineBasicBlock::iterator MBBI,
85 MachineBasicBlock::iterator MBBI,
88 MachineBasicBlock::iterator MBBI, unsigned Opc,
91 MachineBasicBlock::iterator MBBI);
92 bool expandCALL_BTI(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI);
94 MachineBasicBlock::iterator MBBI);
96 MachineBasicBlock::iterator MBBI);
98 MachineBasicBlock::iterator MBBI);
126 MachineBasicBlock::iterator MBBI,
128 MachineInstr &MI = *MBBI;
155 MIBS.push_back(BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(I->Opcode))
163 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(I->Opcode))
176 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(I->Opcode))
187 MIBS.push_back(BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(I->Opcode))
195 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(I->Opcode))
208 MIBS.push_back(BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(I->Opcode))
219 MIBS.push_back(BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(I->Opcode))
236 MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned LdarOp,
239 MachineInstr &MI = *MBBI;
316 MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
318 MachineInstr &MI = *MBBI;
492 MachineBasicBlock::iterator MBBI) {
616 PRFX = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(MovPrfxZero))
631 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(LSLZero))
639 PRFX = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(MovPrfx))
648 DOP = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opcode))
674 finalizeBundle(MBB, PRFX->getIterator(), MBBI->getIterator());
684 MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
686 MachineInstr &MI = *MBBI;
702 BuildMI(MBB, MBBI, DL, TII->get(OpCode1), AddressReg)
709 BuildMI(MBB, MBBI, DL, TII->get(AArch64::MOVi64imm), SizeReg)
761 MachineBasicBlock::iterator MBBI,
774 MachineInstr &MI = *MBBI;
780 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opc))
791 // the implicit operands from *MBBI, starting at the regmask.
793 MachineBasicBlock::iterator MBBI,
799 MachineInstr *Call = BuildMI(MBB, MBBI, MBBI->getDebugLoc(), TII->get(Opcode))
806 while (!MBBI->getOperand(RegMaskStartIdx).isRegMask()) {
807 const MachineOperand &MOP = MBBI->getOperand(RegMaskStartIdx);
815 llvm::drop_begin(MBBI->operands(), RegMaskStartIdx))
821 // Create a call to CallTarget, copying over all the operands from *MBBI,
824 MachineBasicBlock::iterator MBBI,
832 return createCallWithOps(MBB, MBBI, TII, Opc, CallTarget, RegMaskStartIdx);
836 MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI) {
842 MachineInstr &MI = *MBBI;
861 OriginalCall = createCallWithOps(MBB, MBBI, TII, AArch64::BLRA, Ops,
865 OriginalCall = createCall(MBB, MBBI, TII, MI.getOperand(1),
870 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::ORRXrs))
876 auto *RVCall = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::BL))
890 MachineBasicBlock::iterator MBBI) {
896 MachineInstr &MI = *MBBI;
897 MachineInstr *Call = createCall(MBB, MBBI, TII, MI.getOperand(0),
904 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::HINT))
918 MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI) {
919 Register CtxReg = MBBI->getOperand(0).getReg();
920 Register BaseReg = MBBI->getOperand(1).getReg();
921 int Offset = MBBI->getOperand(2).getImm();
922 DebugLoc DL(MBBI->getDebugLoc());
926 BuildMI(MBB, MBBI, DL, TII->get(AArch64::STRXui))
931 MBBI->eraseFromParent();
943 BuildMI(MBB, MBBI, DL, TII->get(Opc), AArch64::X16)
948 BuildMI(MBB, MBBI, DL, TII->get(AArch64::MOVKXi), AArch64::X16)
955 BuildMI(MBB, MBBI, DL, TII->get(AArch64::ORRXrs), AArch64::X17)
960 BuildMI(MBB, MBBI, DL, TII->get(AArch64::PACDB), AArch64::X17)
964 BuildMI(MBB, MBBI, DL, TII->get(AArch64::STRXui))
970 MBBI->eraseFromParent();
976 MachineBasicBlock::iterator MBBI) {
977 MachineInstr &MI = *MBBI;
978 assert((std::next(MBBI) != MBB.end() ||
985 MachineInstrBuilder Cbz = BuildMI(MBB, MBBI, DL, TII->get(AArch64::CBZX))
992 MachineInstr &PrevMI = *std::prev(MBBI);
1018 MachineBasicBlock::iterator MBBI) {
1019 MachineInstr &MI = *MBBI;
1024 // in order to split the block at MBBI.
1025 if (std::next(MBBI) == MBB.end() &&
1085 BuildMI(MBB, MBBI, DL, TII->get(Opc)).addReg(SMReg32).addImm(0);
1091 MachineInstr &PrevMI = *std::prev(MBBI);
1121 MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
1124 MachineInstr &MI = *MBBI;
1137 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opc))
1147 /// If MBBI references a pseudo instruction that should be expanded here,
1150 MachineBasicBlock::iterator MBBI,
1152 MachineInstr &MI = *MBBI;
1161 return expand_DestructiveOp(MI, MBB, MBBI);
1174 BuildMI(MBB, MBBI, MI.getDebugLoc(),
1183 BuildMI(MBB, MBBI, MI.getDebugLoc(),
1193 BuildMI(MBB, MBBI, MI.getDebugLoc(),
1201 BuildMI(MBB, MBBI, MI.getDebugLoc(),
1209 BuildMI(MBB, MBBI, MI.getDebugLoc(),
1281 MBB.insert(MBBI, NewMI);
1303 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(),
1320 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::ADRP), DstReg);
1327 MIB2 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::LDRWui))
1333 MIB2 = BuildMI(MBB, MBBI, DL, TII->get(AArch64::LDRXui))
1376 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::ADRP), DstReg)
1378 auto MIB2 = BuildMI(MBB, MBBI, MI.getDebugLoc(),
1398 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::ADRP), DstReg)
1412 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::MOVKXi), DstReg)
1419 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::ADDXri))
1431 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::ADDXri))
1451 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::MRS), DstReg)
1458 return expandMOVImm(MBB, MBBI, 32);
1460 return expandMOVImm(MBB, MBBI, 64);
1468 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::RET))
1475 return expandCMP_SWAP(MBB, MBBI, AArch64::LDAXRB, AArch64::STLXRB,
1480 return expandCMP_SWAP(MBB, MBBI, AArch64::LDAXRH, AArch64::STLXRH,
1485 return expandCMP_SWAP(MBB, MBBI, AArch64::LDAXRW, AArch64::STLXRW,
1490 return expandCMP_SWAP(MBB, MBBI,
1498 return expandCMP_SWAP_128(MBB, MBBI, NextMBBI);
1503 BuildMI(MBB, MBBI, MI.getDebugLoc(),
1534 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::IRG))
1543 BuildMI(MBB, MBBI, MI.getDebugLoc(),
1554 return expandSetTagLoop(MBB, MBBI, NextMBBI);
1561 return expandSVESpillFill(MBB, MBBI, AArch64::STR_ZXI, 4);
1563 return expandSVESpillFill(MBB, MBBI, AArch64::STR_ZXI, 3);
1565 return expandSVESpillFill(MBB, MBBI, AArch64::STR_ZXI, 2);
1567 return expandSVESpillFill(MBB, MBBI, AArch64::STR_PXI, 2);
1569 return expandSVESpillFill(MBB, MBBI, AArch64::LDR_ZXI, 4);
1571 return expandSVESpillFill(MBB, MBBI, AArch64::LDR_ZXI, 3);
1573 return expandSVESpillFill(MBB, MBBI, AArch64::LDR_ZXI, 2);
1575 return expandSVESpillFill(MBB, MBBI, AArch64::LDR_PXI, 2);
1578 return expandCALL_RVMARKER(MBB, MBBI);
1580 return expandCALL_BTI(MBB, MBBI);
1582 return expandStoreSwiftAsyncContext(MBB, MBBI);
1584 auto *NewMBB = expandRestoreZA(MBB, MBBI);
1590 auto *NewMBB = expandCondSMToggle(MBB, MBBI);
1603 MBB, MBBI, AArch64::ZPR2RegClass, AArch64::ZPR2StridedRegClass,
1607 MBB, MBBI, AArch64::ZPR2RegClass, AArch64::ZPR2StridedRegClass,
1611 MBB, MBBI, AArch64::ZPR2RegClass, AArch64::ZPR2StridedRegClass,
1615 MBB, MBBI, AArch64::ZPR2RegClass, AArch64::ZPR2StridedRegClass,
1619 MBB, MBBI, AArch64::ZPR2RegClass, AArch64::ZPR2StridedRegClass,
1623 MBB, MBBI, AArch64::ZPR2RegClass, AArch64::ZPR2StridedRegClass,
1627 MBB, MBBI, AArch64::ZPR2RegClass, AArch64::ZPR2StridedRegClass,
1631 MBB, MBBI, AArch64::ZPR2RegClass, AArch64::ZPR2StridedRegClass,
1634 return expandMultiVecPseudo(MBB, MBBI, AArch64::ZPR2RegClass,
1638 return expandMultiVecPseudo(MBB, MBBI, AArch64::ZPR2RegClass,
1642 return expandMultiVecPseudo(MBB, MBBI, AArch64::ZPR2RegClass,
1646 return expandMultiVecPseudo(MBB, MBBI, AArch64::ZPR2RegClass,
1651 MBB, MBBI, AArch64::ZPR2RegClass, AArch64::ZPR2StridedRegClass,
1655 MBB, MBBI, AArch64::ZPR2RegClass, AArch64::ZPR2StridedRegClass,
1659 MBB, MBBI, AArch64::ZPR2RegClass, AArch64::ZPR2StridedRegClass,
1663 MBB, MBBI, AArch64::ZPR2RegClass, AArch64::ZPR2StridedRegClass,
1667 MBB, MBBI, AArch64::ZPR4RegClass, AArch64::ZPR4StridedRegClass,
1671 MBB, MBBI, AArch64::ZPR4RegClass, AArch64::ZPR4StridedRegClass,
1675 MBB, MBBI, AArch64::ZPR4RegClass, AArch64::ZPR4StridedRegClass,
1679 MBB, MBBI, AArch64::ZPR4RegClass, AArch64::ZPR4StridedRegClass,
1683 MBB, MBBI, AArch64::ZPR4RegClass, AArch64::ZPR4StridedRegClass,
1687 MBB, MBBI, AArch64::ZPR4RegClass, AArch64::ZPR4StridedRegClass,
1691 MBB, MBBI, AArch64::ZPR4RegClass, AArch64::ZPR4StridedRegClass,
1695 MBB, MBBI, AArch64::ZPR4RegClass, AArch64::ZPR4StridedRegClass,
1698 return expandMultiVecPseudo(MBB, MBBI, AArch64::ZPR4RegClass,
1702 return expandMultiVecPseudo(MBB, MBBI, AArch64::ZPR4RegClass,
1706 return expandMultiVecPseudo(MBB, MBBI, AArch64::ZPR4RegClass,
1710 return expandMultiVecPseudo(MBB, MBBI, AArch64::ZPR4RegClass,
1715 MBB, MBBI, AArch64::ZPR4RegClass, AArch64::ZPR4StridedRegClass,
1719 MBB, MBBI, AArch64::ZPR4RegClass, AArch64::ZPR4StridedRegClass,
1723 MBB, MBBI, AArch64::ZPR4RegClass, AArch64::ZPR4StridedRegClass,
1727 MBB, MBBI, AArch64::ZPR4RegClass, AArch64::ZPR4StridedRegClass,
1738 MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end();
1739 while (MBBI != E) {
1740 MachineBasicBlock::iterator NMBBI = std::next(MBBI);
1741 Modified |= expandMI(MBB, MBBI, NMBBI);
1742 MBBI = NMBBI;