Lines Matching defs:LoadCmpBB

252   auto LoadCmpBB = MF->CreateMachineBasicBlock(MBB.getBasicBlock());
256   MF->insert(++MBB.getIterator(), LoadCmpBB);
257   MF->insert(++LoadCmpBB->getIterator(), StoreBB);
266     BuildMI(LoadCmpBB, MIMD, TII->get(AArch64::MOVZWi), StatusReg)
268   BuildMI(LoadCmpBB, MIMD, TII->get(LdarOp), Dest.getReg())
270   BuildMI(LoadCmpBB, MIMD, TII->get(CmpOp), ZeroReg)
274   BuildMI(LoadCmpBB, MIMD, TII->get(AArch64::Bcc))
278   LoadCmpBB->addSuccessor(DoneBB);
279   LoadCmpBB->addSuccessor(StoreBB);
289       .addMBB(LoadCmpBB);
290   StoreBB->addSuccessor(LoadCmpBB);
296   MBB.addSuccessor(LoadCmpBB);
305   computeAndAddLiveIns(LiveRegs, *LoadCmpBB);
309   LoadCmpBB->clearLiveIns();
310   computeAndAddLiveIns(LiveRegs, *LoadCmpBB);
357   auto LoadCmpBB = MF->CreateMachineBasicBlock(MBB.getBasicBlock());
362   MF->insert(++MBB.getIterator(), LoadCmpBB);
363   MF->insert(++LoadCmpBB->getIterator(), StoreBB);
372   BuildMI(LoadCmpBB, MIMD, TII->get(LdxpOp))
376   BuildMI(LoadCmpBB, MIMD, TII->get(AArch64::SUBSXrs), AArch64::XZR)
380   BuildMI(LoadCmpBB, MIMD, TII->get(AArch64::CSINCWr), StatusReg)
384   BuildMI(LoadCmpBB, MIMD, TII->get(AArch64::SUBSXrs), AArch64::XZR)
388   BuildMI(LoadCmpBB, MIMD, TII->get(AArch64::CSINCWr), StatusReg)
392   BuildMI(LoadCmpBB, MIMD, TII->get(AArch64::CBNZW))
395   LoadCmpBB->addSuccessor(FailBB);
396   LoadCmpBB->addSuccessor(StoreBB);
407       .addMBB(LoadCmpBB);
409   StoreBB->addSuccessor(LoadCmpBB);
421       .addMBB(LoadCmpBB);
422   FailBB->addSuccessor(LoadCmpBB);
428   MBB.addSuccessor(LoadCmpBB);
438   computeAndAddLiveIns(LiveRegs, *LoadCmpBB);
445   LoadCmpBB->clearLiveIns();
446   computeAndAddLiveIns(LiveRegs, *LoadCmpBB);