Lines Matching defs:ItinData

1442 TargetInstrInfo::getOperandLatency(const InstrItineraryData *ItinData,
1445   if (!ItinData || ItinData->isEmpty())
1453     return ItinData->getOperandCycle(DefClass, DefIdx);
1455   return ItinData->getOperandLatency(DefClass, DefIdx, UseClass, UseIdx);
1458 unsigned TargetInstrInfo::getInstrLatency(const InstrItineraryData *ItinData,
1460   if (!ItinData || ItinData->isEmpty())
1466   return ItinData->getStageLatency(get(N->getMachineOpcode()).getSchedClass());
1473 unsigned TargetInstrInfo::getNumMicroOps(const InstrItineraryData *ItinData,
1475   if (!ItinData || ItinData->isEmpty())
1479   int UOps = ItinData->Itineraries[Class].NumMicroOps;
1504 unsigned TargetInstrInfo::getInstrLatency(const InstrItineraryData *ItinData,
1509   if (!ItinData)
1512   return ItinData->getStageLatency(MI.getDesc().getSchedClass());
1518   const InstrItineraryData *ItinData = SchedModel.getInstrItineraries();
1519   if (!ItinData || ItinData->isEmpty())
1524       ItinData->getOperandCycle(DefClass, DefIdx);
1644     const InstrItineraryData *ItinData, const MachineInstr &DefMI,
1648   return ItinData->getOperandLatency(DefClass, DefIdx, UseClass, UseIdx);