Lines Matching defs:TargetLowering
1 //===-- TargetLowering.cpp - Implement the TargetLowering class -----------===//
9 // This implements the TargetLowering class.
13 #include "llvm/CodeGen/TargetLowering.h"
40 TargetLowering::TargetLowering(const TargetMachine &tm)
43 const char *TargetLowering::getTargetNodeName(unsigned Opcode) const {
47 bool TargetLowering::isPositionIndependent() const {
53 bool TargetLowering::isInTailCallPosition(SelectionDAG &DAG, SDNode *Node,
83 bool TargetLowering::parametersInCSRMatch(const MachineRegisterInfo &MRI,
146 TargetLowering::makeLibCall(SelectionDAG &DAG, RTLIB::Libcall LC, EVT RetVT,
154 TargetLowering::ArgListTy Args;
157 TargetLowering::ArgListEntry Entry;
179 TargetLowering::CallLoweringInfo CLI(DAG);
199 bool TargetLowering::findOptimalMemOpLowering(
291 void TargetLowering::softenSetCCOperands(SelectionDAG &DAG, EVT VT,
301 void TargetLowering::softenSetCCOperands(SelectionDAG &DAG, EVT VT,
406 TargetLowering::MakeLibCallOptions CallOptions;
443 unsigned TargetLowering::getJumpTableEncoding() const {
456 SDValue TargetLowering::getPICJumpTableRelocBase(SDValue Table,
471 TargetLowering::getPICJumpTableRelocBaseExpr(const MachineFunction *MF,
477 SDValue TargetLowering::expandIndirectJTBranch(const SDLoc &dl, SDValue Value,
489 TargetLowering::isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const {
513 bool TargetLowering::ShrinkDemandedConstant(SDValue Op,
560 bool TargetLowering::ShrinkDemandedConstant(SDValue Op,
574 bool TargetLowering::ShrinkDemandedOp(SDValue Op, unsigned BitWidth,
601 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
620 bool TargetLowering::SimplifyDemandedBits(SDValue Op, const APInt &DemandedBits,
635 bool TargetLowering::SimplifyDemandedBits(SDValue Op, const APInt &DemandedBits,
652 bool TargetLowering::SimplifyDemandedBits(SDValue Op, const APInt &DemandedBits,
670 SDValue TargetLowering::SimplifyMultipleUseDemandedBits(
930 SDValue TargetLowering::SimplifyMultipleUseDemandedBits(
944 SDValue TargetLowering::SimplifyMultipleUseDemandedVectorElts(
955 TargetLowering::TargetLoweringOpt &TLO,
956 const TargetLowering &TLI,
1101 bool TargetLowering::SimplifyDemandedBits(
1625 const TargetLowering &TLI = TLO.DAG.getTargetLoweringInfo();
1727 TargetLowering::ZeroOrOneBooleanContent &&
2975 bool TargetLowering::SimplifyDemandedVectorElts(SDValue Op,
3041 bool TargetLowering::SimplifyDemandedVectorElts(
3053 const TargetLowering &TLI = TLO.DAG.getTargetLoweringInfo();
3725 void TargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
3739 void TargetLowering::computeKnownBitsForTargetInstr(
3746 void TargetLowering::computeKnownBitsForFrameIndex(
3752 Align TargetLowering::computeKnownAlignForTargetInstr(
3760 unsigned TargetLowering::ComputeNumSignBitsForTargetNode(SDValue Op,
3773 unsigned TargetLowering::computeNumSignBitsForTargetInstr(
3779 bool TargetLowering::SimplifyDemandedVectorEltsForTargetNode(
3791 bool TargetLowering::SimplifyDemandedBitsForTargetNode(
3804 SDValue TargetLowering::SimplifyMultipleUseDemandedBitsForTargetNode(
3818 TargetLowering::buildLegalVectorShuffle(EVT VT, const SDLoc &DL, SDValue N0,
3834 const Constant *TargetLowering::getTargetConstantFromLoad(LoadSDNode*) const {
3838 bool TargetLowering::isGuaranteedNotToBeUndefOrPoisonForTargetNode(
3859 bool TargetLowering::canCreateUndefOrPoisonForTargetNode(
3872 bool TargetLowering::isKnownNeverNaNForTargetNode(SDValue Op,
3885 bool TargetLowering::isSplatValueForTargetNode(SDValue Op,
3902 bool TargetLowering::isConstTrueVal(SDValue N) const {
3932 bool TargetLowering::isConstFalseVal(SDValue N) const {
3956 bool TargetLowering::isExtendedTrueVal(const ConstantSDNode *N, EVT VT,
3961 TargetLowering::BooleanContent Cnt = getBooleanContents(VT);
3963 case TargetLowering::ZeroOrOneBooleanContent:
3967 case TargetLowering::UndefinedBooleanContent:
3968 case TargetLowering::ZeroOrNegativeOneBooleanContent:
3976 SDValue TargetLowering::foldSetCCWithAnd(EVT VT, SDValue N0, SDValue N1,
3991 (getBooleanContents(OpVT) == TargetLowering::UndefinedBooleanContent ||
3992 getBooleanContents(OpVT) == TargetLowering::ZeroOrOneBooleanContent)) {
4079 SDValue TargetLowering::optimizeSetCCOfSignedTruncationCheck(
4163 SDValue TargetLowering::optimizeSetCCByHoistingAndByConstFromLogicalShift(
4175 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
4235 SDValue TargetLowering::foldSetCCWithBinOp(EVT VT, SDValue N0, SDValue N1,
4273 static SDValue simplifySetCCWithCTPOP(const TargetLowering &TLI, EVT VT,
4458 SDValue TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1,
5102 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
5437 bool TargetLowering::isGAPlusOffset(SDNode *WN, const GlobalValue *&GA,
5467 SDValue TargetLowering::PerformDAGCombine(SDNode *N,
5477 TargetLowering::ConstraintType
5478 TargetLowering::getConstraintType(StringRef Constraint) const {
5524 const char *TargetLowering::LowerXConstraint(EVT ConstraintVT) const {
5532 SDValue TargetLowering::LowerAsmOutputForConstraint(
5540 void TargetLowering::LowerAsmOperandForConstraint(SDValue Op,
5617 void TargetLowering::CollectTargetIntrinsicOperands(
5622 TargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *RI,
5666 bool TargetLowering::AsmOperandInfo::isMatchingInputConstraint() const {
5673 unsigned TargetLowering::AsmOperandInfo::getMatchedOperand() const {
5683 TargetLowering::AsmOperandInfoVector
5684 TargetLowering::ParseConstraints(const DataLayout &DL,
5872 static unsigned getConstraintPiority(TargetLowering::ConstraintType CT) {
5874 case TargetLowering::C_Immediate:
5875 case TargetLowering::C_Other:
5877 case TargetLowering::C_Memory:
5878 case TargetLowering::C_Address:
5880 case TargetLowering::C_RegisterClass:
5882 case TargetLowering::C_Register:
5884 case TargetLowering::C_Unknown:
5893 TargetLowering::ConstraintWeight
5894 TargetLowering::getMultipleConstraintMatchWeight(
5917 TargetLowering::ConstraintWeight
5918 TargetLowering::getSingleConstraintMatchWeight(
5965 /// This is somewhat tricky: constraints (TargetLowering::ConstraintType) fall
5987 TargetLowering::ConstraintGroup TargetLowering::getConstraintPreferences(
5988 TargetLowering::AsmOperandInfo &OpInfo) const {
5993 TargetLowering::ConstraintType CType = getConstraintType(Code);
5996 if (OpInfo.isIndirect && !(CType == TargetLowering::C_Memory ||
5997 CType == TargetLowering::C_Register ||
5998 CType == TargetLowering::C_RegisterClass))
6003 if (CType == TargetLowering::C_Memory && OpInfo.hasMatchingInput())
6019 static bool lowerImmediateIfPossible(TargetLowering::ConstraintPair &P,
6021 const TargetLowering &TLI) {
6023 assert((P.second == TargetLowering::C_Other ||
6024 P.second == TargetLowering::C_Immediate) &&
6037 void TargetLowering::ComputeConstraintToUse(AsmOperandInfo &OpInfo,
6053 BestIdx < E && (G[BestIdx].second == TargetLowering::C_Other ||
6054 G[BestIdx].second == TargetLowering::C_Immediate);
6096 static SDValue BuildExactSDIV(const TargetLowering &TLI, SDNode *N,
6158 static SDValue BuildExactUDIV(const TargetLowering &TLI, SDNode *N,
6218 SDValue TargetLowering::BuildSDIVPow2(SDNode *N, const APInt &Divisor,
6222 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
6229 TargetLowering::BuildSREMPow2(SDNode *N, const APInt &Divisor,
6233 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
6247 SDValue TargetLowering::buildSDIVPow2WithCMov(
6286 SDValue TargetLowering::BuildSDIV(SDNode *N, SelectionDAG &DAG,
6448 SDValue TargetLowering::BuildUDIV(SDNode *N, SelectionDAG &DAG,
6671 SDValue TargetLowering::buildUREMEqFold(EVT SETCCVT, SDValue REMNode,
6688 TargetLowering::prepareUREMEqFold(EVT SETCCVT, SDValue REMNode,
6911 SDValue TargetLowering::buildSREMEqFold(EVT SETCCVT, SDValue REMNode,
6929 TargetLowering::prepareSREMEqFold(EVT SETCCVT, SDValue REMNode,
7198 bool TargetLowering::
7209 SDValue TargetLowering::getSqrtInputTest(SDValue Op, SelectionDAG &DAG,
7234 SDValue TargetLowering::getNegatedExpression(SDValue Op, SelectionDAG &DAG,
7542 bool TargetLowering::expandMUL_LOHI(unsigned Opcode, EVT VT, const SDLoc &dl,
7717 bool TargetLowering::expandMUL(SDNode *N, SDValue &Lo, SDValue &Hi, EVT HiLoVT,
7754 bool TargetLowering::expandDIVREMByConstant(SDNode *N,
7973 SDValue TargetLowering::expandFunnelShift(SDNode *Node,
8062 SDValue TargetLowering::expandROT(SDNode *Node, bool AllowVectorOps,
8117 void TargetLowering::expandShiftParts(SDNode *Node, SDValue &Lo, SDValue &Hi,
8169 bool TargetLowering::expandFP_TO_SINT(SDNode *Node, SDValue &Result,
8240 bool TargetLowering::expandFP_TO_UINT(SDNode *Node, SDValue &Result,
8342 bool TargetLowering::expandUINT_TO_FP(SDNode *Node, SDValue &Result,
8394 TargetLowering::createSelectForFMINNUM_FMAXNUM(SDNode *Node,
8417 SDValue TargetLowering::expandFMINNUM_FMAXNUM(SDNode *Node,
8470 SDValue TargetLowering::expandFMINIMUM_FMAXIMUM(SDNode *N,
8558 SDValue TargetLowering::expandIS_FPCLASS(EVT ResultVT, SDValue Op,
8820 static bool canExpandVectorCTPOP(const TargetLowering &TLI, EVT VT) {
8830 SDValue TargetLowering::expandCTPOP(SDNode *Node, SelectionDAG &DAG) const {
8907 SDValue TargetLowering::expandVPCTPOP(SDNode *Node, SelectionDAG &DAG) const {
8976 SDValue TargetLowering::expandCTLZ(SDNode *Node, SelectionDAG &DAG) const {
9026 SDValue TargetLowering::expandVPCTLZ(SDNode *Node, SelectionDAG &DAG) const {
9053 SDValue TargetLowering::CTTZTableLookup(SDNode *Node, SelectionDAG &DAG,
9097 SDValue TargetLowering::expandCTTZ(SDNode *Node, SelectionDAG &DAG) const {
9153 SDValue TargetLowering::expandVPCTTZ(SDNode *Node, SelectionDAG &DAG) const {
9169 SDValue TargetLowering::expandVPCTTZElements(SDNode *N,
9202 SDValue TargetLowering::expandABS(SDNode *N, SelectionDAG &DAG,
9257 SDValue TargetLowering::expandABD(SDNode *N, SelectionDAG &DAG) const {
9299 SDValue TargetLowering::expandAVG(SDNode *N, SelectionDAG &DAG) const {
9361 SDValue TargetLowering::expandBSWAP(SDNode *N, SelectionDAG &DAG) const {
9419 SDValue TargetLowering::expandVPBSWAP(SDNode *N, SelectionDAG &DAG) const {
9495 SDValue TargetLowering::expandBITREVERSE(SDNode *N, SelectionDAG &DAG) const {
9556 SDValue TargetLowering::expandVPBITREVERSE(SDNode *N, SelectionDAG &DAG) const {
9619 TargetLowering::scalarizeVectorLoad(LoadSDNode *LD,
9708 SDValue TargetLowering::scalarizeVectorStore(StoreSDNode *ST,
9786 TargetLowering::expandUnalignedLoad(LoadSDNode *LD, SelectionDAG &DAG) const {
9935 SDValue TargetLowering::expandUnalignedStore(StoreSDNode *ST,
10069 TargetLowering::IncrementMemoryAddress(SDValue Addr, SDValue Mask,
10141 SDValue TargetLowering::getVectorElementPointer(SelectionDAG &DAG,
10150 SDValue TargetLowering::getVectorSubVecPointer(SelectionDAG &DAG,
10184 SDValue TargetLowering::LowerToTLSEmulatedModel(const GlobalAddressSDNode *GA,
10205 TargetLowering::CallLoweringInfo CLI(DAG);
10221 SDValue TargetLowering::lowerCmpEqZeroToCtlzSrl(SDValue Op,
10244 SDValue TargetLowering::expandIntMINMAX(SDNode *Node, SelectionDAG &DAG) const {
10325 SDValue TargetLowering::expandAddSubSat(SDNode *Node, SelectionDAG &DAG) const {
10441 SDValue TargetLowering::expandCMP(SDNode *Node, SelectionDAG &DAG) const {
10476 SDValue TargetLowering::expandShlSat(SDNode *Node, SelectionDAG &DAG) const {
10515 void TargetLowering::forceExpandWideMUL(SelectionDAG &DAG, const SDLoc &dl,
10577 TargetLowering::MakeLibCallOptions CallOptions;
10604 void TargetLowering::forceExpandWideMUL(SelectionDAG &DAG, const SDLoc &dl,
10632 TargetLowering::expandFixedPointMul(SDNode *Node, SelectionDAG &DAG) const {
10786 TargetLowering::expandFixedPointDiv(unsigned Opcode, const SDLoc &dl,
10871 void TargetLowering::expandUADDSUBO(
10917 void TargetLowering::expandSADDSUBO(
10957 bool TargetLowering::expandMULO(SDNode *Node, SDValue &Result,
11037 SDValue TargetLowering::expandVecReduce(SDNode *Node, SelectionDAG &DAG) const {
11077 SDValue TargetLowering::expandVecReduceSeq(SDNode *Node, SelectionDAG &DAG) const {
11104 bool TargetLowering::expandREM(SDNode *Node, SDValue &Result,
11128 SDValue TargetLowering::expandFP_TO_INT_SAT(SDNode *Node,
11237 SDValue TargetLowering::expandRoundInexactToOdd(EVT ResultVT, SDValue Op,
11305 SDValue TargetLowering::expandFP_ROUND(SDNode *Node, SelectionDAG &DAG) const {
11359 SDValue TargetLowering::expandVectorSplice(SDNode *Node,
11433 SDValue TargetLowering::expandVECTOR_COMPRESS(SDNode *Node,
11535 bool TargetLowering::LegalizeSetCCCondCode(SelectionDAG &DAG, EVT VT,
11541 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
11550 case TargetLowering::Legal:
11553 case TargetLowering::Expand: {