Lines Matching defs:Intrinsic
3345 case Intrinsic::donothing:
3347 case Intrinsic::seh_try_begin:
3348 case Intrinsic::seh_scope_begin:
3349 case Intrinsic::seh_try_end:
3350 case Intrinsic::seh_scope_end:
3356 case Intrinsic::experimental_patchpoint_void:
3357 case Intrinsic::experimental_patchpoint:
3360 case Intrinsic::experimental_gc_statepoint:
3363 case Intrinsic::wasm_rethrow: {
3371 DAG.getTargetConstant(Intrinsic::wasm_rethrow, getCurSDLoc(),
5226 unsigned Intrinsic) {
5250 Intrinsic);
5255 Ops.push_back(DAG.getTargetConstant(Intrinsic, getCurSDLoc(),
6225 static unsigned FixedPointIntrinsicToOpcode(unsigned Intrinsic) {
6226 switch (Intrinsic) {
6227 case Intrinsic::smul_fix:
6229 case Intrinsic::umul_fix:
6231 case Intrinsic::smul_fix_sat:
6233 case Intrinsic::umul_fix_sat:
6235 case Intrinsic::sdiv_fix:
6237 case Intrinsic::udiv_fix:
6239 case Intrinsic::sdiv_fix_sat:
6241 case Intrinsic::udiv_fix_sat:
6262 ->getIntrinsicID() == Intrinsic::call_preallocated_setup &&
6267 if (!Fn || Fn->getIntrinsicID() != Intrinsic::call_preallocated_arg) {
6310 unsigned Intrinsic) {
6312 switch (Intrinsic) {
6313 case Intrinsic::experimental_convergence_anchor:
6316 case Intrinsic::experimental_convergence_entry:
6319 case Intrinsic::experimental_convergence_loop: {
6333 assert(IntrinsicID == Intrinsic::experimental_vector_histogram_add &&
6389 unsigned Intrinsic) {
6399 switch (Intrinsic) {
6402 visitTargetIntrinsic(I, Intrinsic);
6404 case Intrinsic::vscale: {
6409 case Intrinsic::vastart: visitVAStart(I); return;
6410 case Intrinsic::vaend: visitVAEnd(I); return;
6411 case Intrinsic::vacopy: visitVACopy(I); return;
6412 case Intrinsic::returnaddress:
6417 case Intrinsic::addressofreturnaddress:
6422 case Intrinsic::sponentry:
6427 case Intrinsic::frameaddress:
6432 case Intrinsic::read_volatile_register:
6433 case Intrinsic::read_register: {
6445 case Intrinsic::write_register: {
6455 case Intrinsic::memcpy: {
6476 case Intrinsic::memcpy_inline: {
6497 case Intrinsic::memset: {
6512 case Intrinsic::memset_inline: {
6529 case Intrinsic::memmove: {
6550 case Intrinsic::memcpy_element_unordered_atomic: {
6566 case Intrinsic::memmove_element_unordered_atomic: {
6582 case Intrinsic::memset_element_unordered_atomic: {
6597 case Intrinsic::call_preallocated_setup: {
6606 case Intrinsic::call_preallocated_arg: {
6621 case Intrinsic::dbg_declare: {
6639 case Intrinsic::dbg_label: {
6649 case Intrinsic::dbg_assign: {
6657 case Intrinsic::dbg_value: {
6685 case Intrinsic::eh_typeid_for: {
6694 case Intrinsic::eh_return_i32:
6695 case Intrinsic::eh_return_i64:
6703 case Intrinsic::eh_unwind_init:
6706 case Intrinsic::eh_dwarf_cfa:
6711 case Intrinsic::eh_sjlj_callsite: {
6719 case Intrinsic::eh_sjlj_functioncontext: {
6728 case Intrinsic::eh_sjlj_setjmp: {
6738 case Intrinsic::eh_sjlj_longjmp:
6742 case Intrinsic::eh_sjlj_setup_dispatch:
6746 case Intrinsic::masked_gather:
6749 case Intrinsic::masked_load:
6752 case Intrinsic::masked_scatter:
6755 case Intrinsic::masked_store:
6758 case Intrinsic::masked_expandload:
6761 case Intrinsic::masked_compressstore:
6764 case Intrinsic::powi:
6768 case Intrinsic::log:
6771 case Intrinsic::log2:
6775 case Intrinsic::log10:
6779 case Intrinsic::exp:
6782 case Intrinsic::exp2:
6786 case Intrinsic::pow:
6790 case Intrinsic::sqrt:
6791 case Intrinsic::fabs:
6792 case Intrinsic::sin:
6793 case Intrinsic::cos:
6794 case Intrinsic::tan:
6795 case Intrinsic::asin:
6796 case Intrinsic::acos:
6797 case Intrinsic::atan:
6798 case Intrinsic::sinh:
6799 case Intrinsic::cosh:
6800 case Intrinsic::tanh:
6801 case Intrinsic::exp10:
6802 case Intrinsic::floor:
6803 case Intrinsic::ceil:
6804 case Intrinsic::trunc:
6805 case Intrinsic::rint:
6806 case Intrinsic::nearbyint:
6807 case Intrinsic::round:
6808 case Intrinsic::roundeven:
6809 case Intrinsic::canonicalize: {
6812 switch (Intrinsic) {
6814 case Intrinsic::sqrt: Opcode = ISD::FSQRT; break;
6815 case Intrinsic::fabs: Opcode = ISD::FABS; break;
6816 case Intrinsic::sin: Opcode = ISD::FSIN; break;
6817 case Intrinsic::cos: Opcode = ISD::FCOS; break;
6818 case Intrinsic::tan: Opcode = ISD::FTAN; break;
6819 case Intrinsic::asin: Opcode = ISD::FASIN; break;
6820 case Intrinsic::acos: Opcode = ISD::FACOS; break;
6821 case Intrinsic::atan: Opcode = ISD::FATAN; break;
6822 case Intrinsic::sinh: Opcode = ISD::FSINH; break;
6823 case Intrinsic::cosh: Opcode = ISD::FCOSH; break;
6824 case Intrinsic::tanh: Opcode = ISD::FTANH; break;
6825 case Intrinsic::exp10: Opcode = ISD::FEXP10; break;
6826 case Intrinsic::floor: Opcode = ISD::FFLOOR; break;
6827 case Intrinsic::ceil: Opcode = ISD::FCEIL; break;
6828 case Intrinsic::trunc: Opcode = ISD::FTRUNC; break;
6829 case Intrinsic::rint: Opcode = ISD::FRINT; break;
6830 case Intrinsic::nearbyint: Opcode = ISD::FNEARBYINT; break;
6831 case Intrinsic::round: Opcode = ISD::FROUND; break;
6832 case Intrinsic::roundeven: Opcode = ISD::FROUNDEVEN; break;
6833 case Intrinsic::canonicalize: Opcode = ISD::FCANONICALIZE; break;
6842 case Intrinsic::lround:
6843 case Intrinsic::llround:
6844 case Intrinsic::lrint:
6845 case Intrinsic::llrint: {
6848 switch (Intrinsic) {
6850 case Intrinsic::lround: Opcode = ISD::LROUND; break;
6851 case Intrinsic::llround: Opcode = ISD::LLROUND; break;
6852 case Intrinsic::lrint: Opcode = ISD::LRINT; break;
6853 case Intrinsic::llrint: Opcode = ISD::LLRINT; break;
6862 case Intrinsic::minnum:
6868 case Intrinsic::maxnum:
6874 case Intrinsic::minimum:
6880 case Intrinsic::maximum:
6886 case Intrinsic::copysign:
6892 case Intrinsic::ldexp:
6898 case Intrinsic::frexp: {
6906 case Intrinsic::arithmetic_fence: {
6912 case Intrinsic::fma:
6919 case Intrinsic::INTRINSIC:
6923 #define BEGIN_REGISTER_VP_INTRINSIC(VPID, ...) case Intrinsic::VPID:
6927 case Intrinsic::fptrunc_round: {
6950 case Intrinsic::fmuladd: {
6960 // TODO: Intrinsic calls should have fast-math-flags.
6971 case Intrinsic::convert_to_fp16:
6978 case Intrinsic::convert_from_fp16:
6984 case Intrinsic::fptosi_sat: {
6991 case Intrinsic::fptoui_sat: {
6998 case Intrinsic::set_rounding:
7004 case Intrinsic::is_fpclass: {
7030 case Intrinsic::get_fpenv: {
7058 case Intrinsic::set_fpenv: {
7085 case Intrinsic::reset_fpenv:
7088 case Intrinsic::get_fpmode:
7097 case Intrinsic::set_fpmode:
7102 case Intrinsic::reset_fpmode: {
7107 case Intrinsic::pcmarker: {
7112 case Intrinsic::readcyclecounter: {
7120 case Intrinsic::readsteadycounter: {
7128 case Intrinsic::bitreverse:
7133 case Intrinsic::bswap:
7138 case Intrinsic::cttz: {
7146 case Intrinsic::ctlz: {
7154 case Intrinsic::ctpop: {
7160 case Intrinsic::fshl:
7161 case Intrinsic::fshr: {
7162 bool IsFSHL = Intrinsic == Intrinsic::fshl;
7177 case Intrinsic::sadd_sat: {
7183 case Intrinsic::uadd_sat: {
7189 case Intrinsic::ssub_sat: {
7195 case Intrinsic::usub_sat: {
7201 case Intrinsic::sshl_sat: {
7207 case Intrinsic::ushl_sat: {
7213 case Intrinsic::smul_fix:
7214 case Intrinsic::umul_fix:
7215 case Intrinsic::smul_fix_sat:
7216 case Intrinsic::umul_fix_sat: {
7220 setValue(&I, DAG.getNode(FixedPointIntrinsicToOpcode(Intrinsic), sdl,
7224 case Intrinsic::sdiv_fix:
7225 case Intrinsic::udiv_fix:
7226 case Intrinsic::sdiv_fix_sat:
7227 case Intrinsic::udiv_fix_sat: {
7231 setValue(&I, expandDivFix(FixedPointIntrinsicToOpcode(Intrinsic), sdl,
7235 case Intrinsic::smax: {
7241 case Intrinsic::smin: {
7247 case Intrinsic::umax: {
7253 case Intrinsic::umin: {
7259 case Intrinsic::abs: {
7265 case Intrinsic::scmp: {
7272 case Intrinsic::ucmp: {
7279 case Intrinsic::stacksave: {
7287 case Intrinsic::stackrestore:
7291 case Intrinsic::get_dynamic_area_offset: {
7306 case Intrinsic::stackguard: {
7327 case Intrinsic::stackprotector: {
7355 case Intrinsic::objectsize:
7358 case Intrinsic::is_constant:
7361 case Intrinsic::annotation:
7362 case Intrinsic::ptr_annotation:
7363 case Intrinsic::launder_invariant_group:
7364 case Intrinsic::strip_invariant_group:
7369 case Intrinsic::assume:
7370 case Intrinsic::experimental_noalias_scope_decl:
7371 case Intrinsic::var_annotation:
7372 case Intrinsic::sideeffect:
7377 case Intrinsic::codeview_annotation: {
7388 case Intrinsic::init_trampoline: {
7404 case Intrinsic::adjust_trampoline:
7409 case Intrinsic::gcroot: {
7420 case Intrinsic::gcread:
7421 case Intrinsic::gcwrite:
7423 case Intrinsic::get_rounding:
7429 case Intrinsic::expect:
7434 case Intrinsic::ubsantrap:
7435 case Intrinsic::debugtrap:
7436 case Intrinsic::trap: {
7440 switch (Intrinsic) {
7441 case Intrinsic::trap:
7444 case Intrinsic::debugtrap:
7447 case Intrinsic::ubsantrap:
7459 if (Intrinsic == Intrinsic::ubsantrap) {
7478 case Intrinsic::allow_runtime_check:
7479 case Intrinsic::allow_ubsan_check:
7483 case Intrinsic::uadd_with_overflow:
7484 case Intrinsic::sadd_with_overflow:
7485 case Intrinsic::usub_with_overflow:
7486 case Intrinsic::ssub_with_overflow:
7487 case Intrinsic::umul_with_overflow:
7488 case Intrinsic::smul_with_overflow: {
7490 switch (Intrinsic) {
7492 case Intrinsic::uadd_with_overflow: Op = ISD::UADDO; break;
7493 case Intrinsic::sadd_with_overflow: Op = ISD::SADDO; break;
7494 case Intrinsic::usub_with_overflow: Op = ISD::USUBO; break;
7495 case Intrinsic::ssub_with_overflow: Op = ISD::SSUBO; break;
7496 case Intrinsic::umul_with_overflow: Op = ISD::UMULO; break;
7497 case Intrinsic::smul_with_overflow: Op = ISD::SMULO; break;
7512 case Intrinsic::prefetch: {
7536 case Intrinsic::lifetime_start:
7537 case Intrinsic::lifetime_end: {
7538 bool IsStart = (Intrinsic == Intrinsic::lifetime_start);
7573 case Intrinsic::pseudoprobe: {
7581 case Intrinsic::invariant_start:
7586 case Intrinsic::invariant_end:
7589 case Intrinsic::clear_cache: {
7599 case Intrinsic::donothing:
7600 case Intrinsic::seh_try_begin:
7601 case Intrinsic::seh_scope_begin:
7602 case Intrinsic::seh_try_end:
7603 case Intrinsic::seh_scope_end:
7606 case Intrinsic::experimental_stackmap:
7609 case Intrinsic::experimental_patchpoint_void:
7610 case Intrinsic::experimental_patchpoint:
7613 case Intrinsic::experimental_gc_statepoint:
7616 case Intrinsic::experimental_gc_result:
7619 case Intrinsic::experimental_gc_relocate:
7622 case Intrinsic::instrprof_cover:
7624 case Intrinsic::instrprof_increment:
7626 case Intrinsic::instrprof_timestamp:
7628 case Intrinsic::instrprof_value_profile:
7630 case Intrinsic::instrprof_mcdc_parameters:
7632 case Intrinsic::instrprof_mcdc_tvbitmap_update:
7634 case Intrinsic::localescape: {
7659 case Intrinsic::localrecover: {
7688 case Intrinsic::eh_exceptionpointer:
7689 case Intrinsic::eh_exceptioncode: {
7696 if (Intrinsic == Intrinsic::eh_exceptioncode)
7701 case Intrinsic::xray_customevent: {
7730 case Intrinsic::xray_typedevent: {
7763 case Intrinsic::experimental_deoptimize:
7766 case Intrinsic::experimental_stepvector:
7769 case Intrinsic::vector_reduce_fadd:
7770 case Intrinsic::vector_reduce_fmul:
7771 case Intrinsic::vector_reduce_add:
7772 case Intrinsic::vector_reduce_mul:
7773 case Intrinsic::vector_reduce_and:
7774 case Intrinsic::vector_reduce_or:
7775 case Intrinsic::vector_reduce_xor:
7776 case Intrinsic::vector_reduce_smax:
7777 case Intrinsic::vector_reduce_smin:
7778 case Intrinsic::vector_reduce_umax:
7779 case Intrinsic::vector_reduce_umin:
7780 case Intrinsic::vector_reduce_fmax:
7781 case Intrinsic::vector_reduce_fmin:
7782 case Intrinsic::vector_reduce_fmaximum:
7783 case Intrinsic::vector_reduce_fminimum:
7784 visitVectorReduce(I, Intrinsic);
7787 case Intrinsic::icall_branch_funnel: {
7841 case Intrinsic::wasm_landingpad_index:
7847 case Intrinsic::aarch64_settag:
7848 case Intrinsic::aarch64_settag_zero: {
7850 bool ZeroMemory = Intrinsic == Intrinsic::aarch64_settag_zero;
7859 case Intrinsic::amdgcn_cs_chain: {
7907 case Intrinsic::ptrmask: {
7927 case Intrinsic::threadlocal_address: {
7931 case Intrinsic::get_active_lane_mask: {
7937 visitTargetIntrinsic(I, Intrinsic);
7955 case Intrinsic::experimental_get_vector_length: {
7965 visitTargetIntrinsic(I, Intrinsic);
7989 case Intrinsic::experimental_vector_partial_reduce_add: {
8020 case Intrinsic::experimental_cttz_elts: {
8026 visitTargetIntrinsic(I, Intrinsic);
8071 case Intrinsic::vector_insert: {
8087 case Intrinsic::vector_extract: {
8102 case Intrinsic::vector_reverse:
8105 case Intrinsic::vector_splice:
8108 case Intrinsic::callbr_landingpad:
8111 case Intrinsic::vector_interleave2:
8114 case Intrinsic::vector_deinterleave2:
8117 case Intrinsic::experimental_vector_compress:
8124 case Intrinsic::experimental_convergence_anchor:
8125 case Intrinsic::experimental_convergence_entry:
8126 case Intrinsic::experimental_convergence_loop:
8127 visitConvergenceControl(I, Intrinsic);
8129 case Intrinsic::experimental_vector_histogram_add: {
8130 visitVectorHistogram(I, Intrinsic);
8191 case Intrinsic::INTRINSIC: \
8195 case Intrinsic::experimental_constrained_fmuladd: {
8242 case Intrinsic::vp_ctlz: {
8247 case Intrinsic::vp_cttz: {
8252 case Intrinsic::vp_cttz_elts: {
8258 case Intrinsic::VPID: \
10702 unsigned Intrinsic) {
10715 switch (Intrinsic) {
10716 case Intrinsic::vector_reduce_fadd:
10724 case Intrinsic::vector_reduce_fmul:
10732 case Intrinsic::vector_reduce_add:
10735 case Intrinsic::vector_reduce_mul:
10738 case Intrinsic::vector_reduce_and:
10741 case Intrinsic::vector_reduce_or:
10744 case Intrinsic::vector_reduce_xor:
10747 case Intrinsic::vector_reduce_smax:
10750 case Intrinsic::vector_reduce_smin:
10753 case Intrinsic::vector_reduce_umax:
10756 case Intrinsic::vector_reduce_umin:
10759 case Intrinsic::vector_reduce_fmax:
10762 case Intrinsic::vector_reduce_fmin:
10765 case Intrinsic::vector_reduce_fmaximum:
10768 case Intrinsic::vector_reduce_fminimum: