Lines Matching defs:VTs
89 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
90 SDVTList Res = {VTs, NumVTs};
689 ID.AddPointer(VTList.VTs);
1726 SDVTList VTs = getVTList(EltVT);
1728 AddNodeIDNode(ID, Opc, VTs, std::nullopt);
1738 N = newSDNode<ConstantSDNode>(isT, isO, Elt, VTs);
1788 SDVTList VTs = getVTList(EltVT);
1790 AddNodeIDNode(ID, Opc, VTs, std::nullopt);
1799 N = newSDNode<ConstantFPSDNode>(isTarget, &V, VTs);
1846 SDVTList VTs = getVTList(VT);
1848 AddNodeIDNode(ID, Opc, VTs, std::nullopt);
1857 Opc, DL.getIROrder(), DL.getDebugLoc(), GV, VTs, Offset, TargetFlags);
1865 SDVTList VTs = getVTList(VT);
1867 AddNodeIDNode(ID, Opc, VTs, std::nullopt);
1873 auto *N = newSDNode<FrameIndexSDNode>(FI, VTs, isTarget);
1884 SDVTList VTs = getVTList(VT);
1886 AddNodeIDNode(ID, Opc, VTs, std::nullopt);
1893 auto *N = newSDNode<JumpTableSDNode>(JTI, VTs, isTarget, TargetFlags);
1916 SDVTList VTs = getVTList(VT);
1918 AddNodeIDNode(ID, Opc, VTs, std::nullopt);
1927 auto *N = newSDNode<ConstantPoolSDNode>(isTarget, C, VTs, Offset, *Alignment,
1944 SDVTList VTs = getVTList(VT);
1946 AddNodeIDNode(ID, Opc, VTs, std::nullopt);
1955 auto *N = newSDNode<ConstantPoolSDNode>(isTarget, C, VTs, Offset, *Alignment,
2228 SDVTList VTs = getVTList(VT);
2231 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, VTs, Ops);
2245 auto *N = newSDNode<ShuffleVectorSDNode>(VTs, dl.getIROrder(),
2267 SDVTList VTs = getVTList(VT);
2269 AddNodeIDNode(ID, ISD::Register, VTs, std::nullopt);
2275 auto *N = newSDNode<RegisterSDNode>(RegNo, VTs);
2324 SDVTList VTs = getVTList(VT);
2327 AddNodeIDNode(ID, Opc, VTs, std::nullopt);
2335 auto *N = newSDNode<BlockAddressSDNode>(Opc, VTs, BA, Offset, TargetFlags);
2380 SDVTList VTs = getVTList(VT);
2383 AddNodeIDNode(ID, ISD::ADDRSPACECAST, VTs, Ops);
2392 VTs, SrcAS, DestAS);
3772 // MemoryVT (which may or may not be vector) and the range VTs original
5882 SDVTList VTs = getVTList(VT);
5884 AddNodeIDNode(ID, Opcode, VTs, std::nullopt);
5889 auto *N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
6226 SDVTList VTs = getVTList(VT);
6230 AddNodeIDNode(ID, Opcode, VTs, Ops);
6237 N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
6242 N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
6844 SDVTList VTs = getVTList(Val.getValueType());
6846 AddNodeIDNode(ID, ISD::AssertAlign, VTs, {Val});
6854 newSDNode<AssertAlignSDNode>(DL.getIROrder(), DL.getDebugLoc(), VTs, A);
7285 "Extract subvector VTs must be vectors!");
7287 "Extract subvector VTs must have the same element type!");
7381 SDVTList VTs = getVTList(VT);
7385 AddNodeIDNode(ID, Opcode, VTs, Ops);
7392 N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
7397 N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
7518 "Insert subvector VTs must be vectors!");
7520 "Insert subvector VTs must have the same element type!");
7579 SDVTList VTs = getVTList(VT);
7583 AddNodeIDNode(ID, Opcode, VTs, Ops);
7590 N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
7595 N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
8659 EVT MemVT, SDVTList VTs, SDValue Chain,
8667 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO);
8696 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) :
8699 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO);
8707 SDVTList VTs = getVTList(VT, MVT::Other);
8709 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO);
8717 SmallVector<EVT, 4> VTs;
8718 VTs.reserve(Ops.size());
8720 VTs.push_back(Op.getValueType());
8721 return getNode(ISD::MERGE_VALUES, dl, getVTList(VTs), Ops);
8752 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
8786 const auto VTs = getVTList(MVT::Other);
8794 AddNodeIDNode(ID, Opcode, VTs, Ops);
8803 Opcode, dl.getIROrder(), dl.getDebugLoc(), VTs, Size, Offset);
8816 const auto VTs = getVTList(MVT::Other);
8819 AddNodeIDNode(ID, Opcode, VTs, Ops);
8827 Opcode, Dl.getIROrder(), Dl.getDebugLoc(), VTs, Guid, Index, Attr);
8923 SDVTList VTs = Indexed ?
8927 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops);
8930 dl.getIROrder(), VTs, AM, ExtType, MemVT, MMO));
8938 auto *N = newSDNode<LoadSDNode>(dl.getIROrder(), dl.getDebugLoc(), VTs, AM,
9024 SDVTList VTs = getVTList(MVT::Other);
9028 AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
9031 dl.getIROrder(), VTs, ISD::UNINDEXED, false, VT, MMO));
9039 auto *N = newSDNode<StoreSDNode>(dl.getIROrder(), dl.getDebugLoc(), VTs,
9091 SDVTList VTs = getVTList(MVT::Other);
9095 AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
9098 dl.getIROrder(), VTs, ISD::UNINDEXED, true, SVT, MMO));
9106 auto *N = newSDNode<StoreSDNode>(dl.getIROrder(), dl.getDebugLoc(), VTs,
9122 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
9125 AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
9134 auto *N = newSDNode<StoreSDNode>(dl.getIROrder(), dl.getDebugLoc(), VTs, AM,
9178 SDVTList VTs = Indexed ? getVTList(VT, Ptr.getValueType(), MVT::Other)
9182 AddNodeIDNode(ID, ISD::VP_LOAD, VTs, Ops);
9185 dl.getIROrder(), VTs, AM, ExtType, IsExpanding, MemVT, MMO));
9193 auto *N = newSDNode<VPLoadSDNode>(dl.getIROrder(), dl.getDebugLoc(), VTs, AM,
9271 SDVTList VTs = Indexed ? getVTList(Ptr.getValueType(), MVT::Other)
9275 AddNodeIDNode(ID, ISD::VP_STORE, VTs, Ops);
9278 dl.getIROrder(), VTs, AM, IsTruncating, IsCompressing, MemVT, MMO));
9286 auto *N = newSDNode<VPStoreSDNode>(dl.getIROrder(), dl.getDebugLoc(), VTs, AM,
9342 SDVTList VTs = getVTList(MVT::Other);
9346 AddNodeIDNode(ID, ISD::VP_STORE, VTs, Ops);
9349 dl.getIROrder(), VTs, ISD::UNINDEXED, true, IsCompressing, SVT, MMO));
9358 newSDNode<VPStoreSDNode>(dl.getIROrder(), dl.getDebugLoc(), VTs,
9374 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
9378 AddNodeIDNode(ID, ISD::VP_STORE, VTs, Ops);
9388 dl.getIROrder(), dl.getDebugLoc(), VTs, AM, ST->isTruncatingStore(),
9407 SDVTList VTs = Indexed ? getVTList(VT, Ptr.getValueType(), MVT::Other)
9410 AddNodeIDNode(ID, ISD::EXPERIMENTAL_VP_STRIDED_LOAD, VTs, Ops);
9413 DL.getIROrder(), VTs, AM, ExtType, IsExpanding, MemVT, MMO));
9423 newSDNode<VPStridedLoadSDNode>(DL.getIROrder(), DL.getDebugLoc(), VTs, AM,
9462 SDVTList VTs = Indexed ? getVTList(Ptr.getValueType(), MVT::Other)
9466 AddNodeIDNode(ID, ISD::EXPERIMENTAL_VP_STRIDED_STORE, VTs, Ops);
9469 DL.getIROrder(), VTs, AM, IsTruncating, IsCompressing, MemVT, MMO));
9477 VTs, AM, IsTruncating,
9511 SDVTList VTs = getVTList(MVT::Other);
9515 AddNodeIDNode(ID, ISD::EXPERIMENTAL_VP_STRIDED_STORE, VTs, Ops);
9518 DL.getIROrder(), VTs, ISD::UNINDEXED, true, IsCompressing, SVT, MMO));
9526 VTs, ISD::UNINDEXED, true,
9537 SDValue SelectionDAG::getGatherVP(SDVTList VTs, EVT VT, const SDLoc &dl,
9543 AddNodeIDNode(ID, ISD::VP_GATHER, VTs, Ops);
9546 dl.getIROrder(), VTs, VT, MMO, IndexType));
9555 auto *N = newSDNode<VPGatherSDNode>(dl.getIROrder(), dl.getDebugLoc(), VTs,
9580 SDValue SelectionDAG::getScatterVP(SDVTList VTs, EVT VT, const SDLoc &dl,
9587 AddNodeIDNode(ID, ISD::VP_SCATTER, VTs, Ops);
9590 dl.getIROrder(), VTs, VT, MMO, IndexType));
9598 auto *N = newSDNode<VPScatterSDNode>(dl.getIROrder(), dl.getDebugLoc(), VTs,
9633 SDVTList VTs = Indexed ? getVTList(VT, Base.getValueType(), MVT::Other)
9637 AddNodeIDNode(ID, ISD::MLOAD, VTs, Ops);
9640 dl.getIROrder(), VTs, AM, ExtTy, isExpanding, MemVT, MMO));
9648 auto *N = newSDNode<MaskedLoadSDNode>(dl.getIROrder(), dl.getDebugLoc(), VTs,
9681 SDVTList VTs = Indexed ? getVTList(Base.getValueType(), MVT::Other)
9685 AddNodeIDNode(ID, ISD::MSTORE, VTs, Ops);
9688 dl.getIROrder(), VTs, AM, IsTruncating, IsCompressing, MemVT, MMO));
9697 newSDNode<MaskedStoreSDNode>(dl.getIROrder(), dl.getDebugLoc(), VTs, AM,
9719 SDValue SelectionDAG::getMaskedGather(SDVTList VTs, EVT MemVT, const SDLoc &dl,
9727 AddNodeIDNode(ID, ISD::MGATHER, VTs, Ops);
9730 dl.getIROrder(), VTs, MemVT, MMO, IndexType, ExtTy));
9740 VTs, MemVT, MMO, IndexType, ExtTy);
9766 SDValue SelectionDAG::getMaskedScatter(SDVTList VTs, EVT MemVT, const SDLoc &dl,
9774 AddNodeIDNode(ID, ISD::MSCATTER, VTs, Ops);
9777 dl.getIROrder(), VTs, MemVT, MMO, IndexType, IsTrunc));
9787 VTs, MemVT, MMO, IndexType, IsTrunc);
9812 SDValue SelectionDAG::getMaskedHistogram(SDVTList VTs, EVT MemVT,
9819 AddNodeIDNode(ID, ISD::EXPERIMENTAL_VECTOR_HISTOGRAM, VTs, Ops);
9822 dl.getIROrder(), VTs, MemVT, MMO, IndexType));
9832 VTs, MemVT, MMO, IndexType);
9853 SDVTList VTs = getVTList(MVT::Other);
9856 AddNodeIDNode(ID, ISD::GET_FPENV_MEM, VTs, Ops);
9859 ISD::GET_FPENV_MEM, dl.getIROrder(), VTs, MemVT, MMO));
9867 dl.getDebugLoc(), VTs, MemVT, MMO);
9880 SDVTList VTs = getVTList(MVT::Other);
9883 AddNodeIDNode(ID, ISD::SET_FPENV_MEM, VTs, Ops);
9886 ISD::SET_FPENV_MEM, dl.getIROrder(), VTs, MemVT, MMO));
9894 dl.getDebugLoc(), VTs, MemVT, MMO);
10123 SDVTList VTs = getVTList(VT);
10127 AddNodeIDNode(ID, Opcode, VTs, Ops);
10133 N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
10138 N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
10165 return getNode(Opcode, DL, VTList.VTs[0], Ops, Flags);
10180 assert(VTList.VTs[0].isInteger() && VTList.VTs[1].isInteger() &&
10182 Ops[0].getValueType() == VTList.VTs[0] &&
10191 SDValue ZeroOverFlow = getConstant(0, DL, VTList.VTs[1]);
10195 if (VTList.VTs[0].isVector() &&
10196 VTList.VTs[0].getVectorElementType() == MVT::i1 &&
10197 VTList.VTs[1].getVectorElementType() == MVT::i1) {
10203 {getNode(ISD::XOR, DL, VTList.VTs[0], F1, F2),
10204 getNode(ISD::AND, DL, VTList.VTs[1], F1, F2)},
10208 SDValue NotF1 = getNOT(DL, F1, VTList.VTs[0]);
10210 {getNode(ISD::XOR, DL, VTList.VTs[0], F1, F2),
10211 getNode(ISD::AND, DL, VTList.VTs[1], NotF1, F2)},
10223 assert(VTList.VTs[0].isInteger() && VTList.VTs[1].isInteger() &&
10225 Ops[0].getValueType() == VTList.VTs[0] &&
10226 Ops[2].getValueType() == VTList.VTs[1] &&
10232 assert(VTList.VTs[0].isInteger() && VTList.VTs[0] == VTList.VTs[1] &&
10233 VTList.VTs[0] == Ops[0].getValueType() &&
10234 VTList.VTs[0] == Ops[1].getValueType() &&
10240 unsigned Width = VTList.VTs[0].getScalarSizeInBits();
10254 getConstant(Val.extractBits(Width, Width), DL, VTList.VTs[0]);
10255 SDValue Lo = getConstant(Val.trunc(Width), DL, VTList.VTs[0]);
10262 assert(VTList.VTs[0].isFloatingPoint() && VTList.VTs[1].isInteger() &&
10263 VTList.VTs[0] == Ops[0].getValueType() && "frexp type mismatch");
10269 SDValue Result0 = getConstantFP(FrexpMant, DL, VTList.VTs[0]);
10271 getConstant(FrexpMant.isFinite() ? FrexpExp : 0, DL, VTList.VTs[1]);
10280 assert(VTList.VTs[0].isFloatingPoint() &&
10282 assert(VTList.VTs[0].isVector() == Ops[1].getValueType().isVector() &&
10285 assert((!VTList.VTs[0].isVector() ||
10286 VTList.VTs[0].getVectorElementCount() ==
10289 assert(Ops[1].getValueType().bitsLT(VTList.VTs[0]) &&
10294 assert(VTList.VTs[0].isVector() == Ops[1].getValueType().isVector() &&
10297 assert((!VTList.VTs[0].isVector() ||
10298 VTList.VTs[0].getVectorElementCount() ==
10301 assert(VTList.VTs[0].isFloatingPoint() &&
10303 VTList.VTs[0].bitsLT(Ops[1].getValueType()) &&
10332 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
10454 SDVTList SelectionDAG::getVTList(ArrayRef<EVT> VTs) {
10455 unsigned NumVTs = VTs.size();
10459 ID.AddInteger(VTs[index].getRawBits());
10466 llvm::copy(VTs, Array);
10622 SDVTList VTs = getVTList(VT);
10623 return SelectNodeTo(N, MachineOpc, VTs, std::nullopt);
10628 SDVTList VTs = getVTList(VT);
10630 return SelectNodeTo(N, MachineOpc, VTs, Ops);
10636 SDVTList VTs = getVTList(VT);
10638 return SelectNodeTo(N, MachineOpc, VTs, Ops);
10644 SDVTList VTs = getVTList(VT);
10646 return SelectNodeTo(N, MachineOpc, VTs, Ops);
10651 SDVTList VTs = getVTList(VT);
10652 return SelectNodeTo(N, MachineOpc, VTs, Ops);
10657 SDVTList VTs = getVTList(VT1, VT2);
10658 return SelectNodeTo(N, MachineOpc, VTs, Ops);
10663 SDVTList VTs = getVTList(VT1, VT2);
10664 return SelectNodeTo(N, MachineOpc, VTs, std::nullopt);
10670 SDVTList VTs = getVTList(VT1, VT2, VT3);
10671 return SelectNodeTo(N, MachineOpc, VTs, Ops);
10677 SDVTList VTs = getVTList(VT1, VT2);
10679 return SelectNodeTo(N, MachineOpc, VTs, Ops);
10683 SDVTList VTs,ArrayRef<SDValue> Ops) {
10684 SDNode *New = MorphNodeTo(N, ~MachineOpc, VTs, Ops);
10728 SDVTList VTs, ArrayRef<SDValue> Ops) {
10731 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) {
10733 AddNodeIDNode(ID, Opc, VTs, Ops);
10743 N->ValueList = VTs.VTs;
10744 N->NumValues = VTs.NumVTs;
10804 SDVTList VTs = getVTList(Node->getValueType(0));
10805 SDNode *Res = MorphNodeTo(Node, NewOpc, VTs, Ops);
10830 SDVTList VTs = getVTList(VT);
10831 return getMachineNode(Opcode, dl, VTs, std::nullopt);
10836 SDVTList VTs = getVTList(VT);
10838 return getMachineNode(Opcode, dl, VTs, Ops);
10843 SDVTList VTs = getVTList(VT);
10845 return getMachineNode(Opcode, dl, VTs, Ops);
10851 SDVTList VTs = getVTList(VT);
10853 return getMachineNode(Opcode, dl, VTs, Ops);
10858 SDVTList VTs = getVTList(VT);
10859 return getMachineNode(Opcode, dl, VTs, Ops);
10865 SDVTList VTs = getVTList(VT1, VT2);
10867 return getMachineNode(Opcode, dl, VTs, Ops);
10873 SDVTList VTs = getVTList(VT1, VT2);
10875 return getMachineNode(Opcode, dl, VTs, Ops);
10881 SDVTList VTs = getVTList(VT1, VT2);
10882 return getMachineNode(Opcode, dl, VTs, Ops);
10888 SDVTList VTs = getVTList(VT1, VT2, VT3);
10890 return getMachineNode(Opcode, dl, VTs, Ops);
10897 SDVTList VTs = getVTList(VT1, VT2, VT3);
10899 return getMachineNode(Opcode, dl, VTs, Ops);
10905 SDVTList VTs = getVTList(VT1, VT2, VT3);
10906 return getMachineNode(Opcode, dl, VTs, Ops);
10912 SDVTList VTs = getVTList(ResultTys);
10913 return getMachineNode(Opcode, dl, VTs, Ops);
10917 SDVTList VTs,
10919 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue;
10925 AddNodeIDNode(ID, ~Opcode, VTs, Ops);
10933 N = newSDNode<MachineSDNode>(~Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
10977 if (VTList.VTs[VTList.NumVTs - 1] != MVT::Glue) {
10992 if (VTList.VTs[VTList.NumVTs - 1] != MVT::Glue) {
12086 SDVTList VTs, EVT memvt, MachineMemOperand *mmo)
12087 : SDNode(Opc, Order, dl, VTs), MemoryVT(memvt), MMO(mmo) {
12111 std::vector<EVT> VTs;
12114 VTs.reserve(MVT::VALUETYPE_SIZE);
12116 VTs.push_back(MVT((MVT::SimpleValueType)i));
12134 return &SimpleVTArray.VTs[VT.getSimpleVT().SimpleTy];
12504 SDVTList VTs = getVTList(ResEltVT, SVT);
12508 SDValue Res = getNode(Opcode, dl, VTs, LHSScalars[i], RHSScalars[i]);
12590 /// VTs and return the low/high part.
12604 /// GetSplitDestVTs - Compute the VTs needed for the low/hi parts of a type
12617 /// GetDependentSplitDestVTs - Compute the VTs needed for the low/hi parts of a