Lines Matching full:scheduled

118   cl::desc("Disable scheduled-height priority in sched=list-ilp"));
166   /// that are "live". These nodes must be scheduled before any other nodes that
167   /// modifies the registers can be scheduled.
415     // predecessor can be scheduled without causing a pipeline stall.
419   // If all the node's successors are scheduled, this node is ready
420   // to be scheduled. Ignore the special EntrySU node.
543 /// entire chain must be scheduled together. Example:
563       // clobber the register is scheduled between the predecessor and
652 /// ready and can be scheduled with no resource conflicts.
659   // has predecessors the cycle will be advanced when they are scheduled.
672   // Calls are scheduled in their preceding cycle, so don't conflict with
706            "This target-independent node should not be scheduled.");
725     // Calls are scheduled with their preceding instructions. For bottom-up
751   // indicate the scheduled cycle.
754   // Reserve resources for the scheduled instruction.
1003     // If LoadSU has already been scheduled, we should clone it but
1021     // If NewSU has already been scheduled, we need to clone it, but this
1129 /// CopyAndMoveSuccessors - Clone the specified node and move its scheduled
1175     // If this can be scheduled don't bother duplicating and just return
1192   // Only copy scheduled successors. Cut them from old node's successor
1218 /// scheduled successors of the given SUnit to the last copy.
1231   // Only copy scheduled successors. Cut them from old node's successor
1467 /// Return a node that can be scheduled in this cycle. Requirements:
1524       // Force the current node to be scheduled before the node that
2039 // priority SUs are scheduled before higher priority SUs.
2057     // scheduled right before its predecessors that it doesn't lengthen
2101     // NumRegDefsLeft is zero when enough uses of this node have been scheduled
2150     // NumRegDefsLeft is zero when enough uses of this node have been scheduled
2193     // NumRegDefsLeft is zero when enough uses of this node have been scheduled
2229   //assert(SU->NumRegDefsLeft == 0 && "not all regdefs have scheduled uses");
2344 /// closestSucc - Returns the scheduled cycle of the successor which is
2396 /// it has no other use. It should be scheduled closer to the terminator.
2460 // means a node that defines the VRegCycle has not been scheduled yet.
2493   // been scheduled will induce a copy. Model this as an extra cycle of latency.
2613   // How many registers becomes live when the node is scheduled.
2686 // Return true if right should be scheduled with higher priority than left.
2855 /// i.e. DepSU should not be scheduled above SU.
2953 /// This results in the store being scheduled immediately
2980         // If PredND is FrameSetup, we should not pre-scheduled the node,
2983         // calls can't be scheduled. If there's no other available node
3062 /// node (if it won't create a cycle) so the two-address one will be scheduled