Lines Matching defs:SrcVT
714 EVT SrcVT = LD->getMemoryVT();
715 TypeSize SrcWidth = SrcVT.getSizeInBits();
719 if (SrcWidth != SrcVT.getStoreSizeInBits() &&
727 (SrcVT != MVT::i1 ||
732 unsigned NewWidth = SrcVT.getStoreSizeInBits();
737 // way. A zext load from NVT thus automatically gives zext from SrcVT.
752 Result, DAG.getValueType(SrcVT));
757 DAG.getValueType(SrcVT));
763 assert(!SrcVT.isVector() && "Unsupported extload!");
842 SrcVT.getSimpleVT())) {
870 if (!TLI.isLoadExtLegal(ISD::EXTLOAD, DestVT, SrcVT)) {
873 EVT LoadVT = TLI.getRegisterType(SrcVT.getSimpleVT());
874 if ((LoadVT.isFloatingPoint() == SrcVT.isFloatingPoint()) &&
875 (TLI.isTypeLegal(SrcVT) || // Same as SrcVT == LoadVT?
876 TLI.isLoadExtLegal(ExtType, LoadVT, SrcVT))) {
880 (LoadVT == SrcVT) ? ISD::NON_EXTLOAD : ExtType;
883 SrcVT, LD->getMemOperand());
885 ISD::getExtForLoadExtType(SrcVT.isFloatingPoint(), ExtType);
895 EVT SVT = SrcVT.getScalarType();
897 EVT ISrcVT = SrcVT.changeTypeToInteger();
911 assert(!SrcVT.isVector() &&
924 Chain, Ptr, SrcVT,
930 Result, DAG.getValueType(SrcVT));
932 ValRes = DAG.getZeroExtendInReg(Result, dl, SrcVT);
1781 EVT SrcVT = SrcOp.getValueType();
1786 if ((SrcVT.bitsGT(SlotVT) &&
1806 if (SrcVT.bitsGT(SlotVT))
1810 assert(SrcVT.bitsEq(SlotVT) && "Invalid store");
2651 EVT SrcVT = Op0.getValueType();
2655 if (SrcVT == MVT::i32 && TLI.isTypeLegal(MVT::f64) &&
2727 if (((SrcVT == MVT::i32 || SrcVT == MVT::i64) && DestVT == MVT::f32) ||
2728 (SrcVT == MVT::i64 && DestVT == MVT::f64)) {
2744 EVT SetCCVT = getSetCCResultType(SrcVT);
2747 dl, SetCCVT, Op0, DAG.getConstant(0, dl, SrcVT), ISD::SETLT);
2749 EVT ShiftVT = TLI.getShiftAmountTy(SrcVT, DAG.getDataLayout());
2751 SDValue Shr = DAG.getNode(ISD::SRL, dl, SrcVT, Op0, ShiftConst);
2752 SDValue AndConst = DAG.getConstant(1, dl, SrcVT);
2753 SDValue And = DAG.getNode(ISD::AND, dl, SrcVT, Op0, AndConst);
2754 SDValue Or = DAG.getNode(ISD::OR, dl, SrcVT, And, Shr);
2760 SDValue InCvt = DAG.getSelect(dl, SrcVT, SignBitTest, Or, Op0);
2788 // The following optimization is valid only if every value in SrcVT (when
2790 // size of DestVT is >= than the number of bits in SrcVT -1.
2792 SrcVT.getSizeInBits() - 1 &&
2802 SDValue SignSet = DAG.getSetCC(dl, getSetCCResultType(SrcVT), Op0,
2803 DAG.getConstant(0, dl, SrcVT), ISD::SETLT);
2813 switch (SrcVT.getSimpleVT().SimpleTy) {
3307 EVT SrcVT = Op.getValueType();
3309 if (SrcVT.getScalarType() == MVT::bf16) {
3314 if ((Tmp1 = EmitStackConvert(Op, SrcVT, DstVT, dl)))