Lines Matching defs:RoundWidth

555     unsigned RoundWidth = 1 << LogStWidth;
556     assert(RoundWidth < StWidthBits);
557     unsigned ExtraWidth = StWidthBits - RoundWidth;
558     assert(ExtraWidth < RoundWidth);
559     assert(!(RoundWidth % 8) && !(ExtraWidth % 8) &&
561     EVT RoundVT = EVT::getIntegerVT(*DAG.getContext(), RoundWidth);
568       // Store the bottom RoundWidth bits.
573       IncrementSize = RoundWidth / 8;
578           DAG.getConstant(RoundWidth, dl,
586       // Store the top RoundWidth bits.
595       IncrementSize = RoundWidth / 8;
767     unsigned RoundWidth = 1 << LogSrcWidth;
768     assert(RoundWidth < SrcWidthBits);
769     unsigned ExtraWidth = SrcWidthBits - RoundWidth;
770     assert(ExtraWidth < RoundWidth);
771     assert(!(RoundWidth % 8) && !(ExtraWidth % 8) &&
773     EVT RoundVT = EVT::getIntegerVT(*DAG.getContext(), RoundWidth);
781       // Load the bottom RoundWidth bits.
787       IncrementSize = RoundWidth / 8;
802           DAG.getConstant(RoundWidth, dl,
810       // Load the top RoundWidth bits.
816       IncrementSize = RoundWidth / 8;