Lines Matching defs:DestVT

157   SDValue EmitStackConvert(SDValue SrcOp, EVT SlotVT, EVT DestVT,
159   SDValue EmitStackConvert(SDValue SrcOp, EVT SlotVT, EVT DestVT,
869       EVT DestVT = Node->getValueType(0);
870       if (!TLI.isLoadExtLegal(ISD::EXTLOAD, DestVT, SrcVT)) {
898           EVT IDestVT = DestVT.changeTypeToInteger();
905                           dl, DestVT, Result);
1771 /// a load from the stack slot to DestVT, extending it if needed.
1774                                                EVT DestVT, const SDLoc &dl) {
1775   return EmitStackConvert(SrcOp, SlotVT, DestVT, dl, DAG.getEntryNode());
1779                                                EVT DestVT, const SDLoc &dl,
1782   Type *DestType = DestVT.getTypeForEVT(*DAG.getContext());
1788       (SlotVT.bitsLT(DestVT) &&
1789        !TLI.isLoadExtLegalOrCustom(ISD::EXTLOAD, DestVT, SlotVT)))
1803   // later than DestVT.
1815   if (SlotVT.bitsEq(DestVT))
1816     return DAG.getLoad(DestVT, dl, Store, FIPtr, PtrInfo, DestAlign);
1818   assert(SlotVT.bitsLT(DestVT) && "Unknown extension!");
1819   return DAG.getExtLoad(ISD::EXTLOAD, dl, DestVT, Store, FIPtr, PtrInfo, SlotVT,
2647   EVT DestVT = Node->getValueType(0);
2656       (DestVT.bitsLE(MVT::f64) ||
2659                             DestVT))) {
2707       if (DestVT != Sub.getValueType()) {
2710             DAG.getStrictFPExtendOrRound(Sub, Chain, dl, DestVT);
2718       Result = DAG.getFPExtendOrRound(Sub, dl, DestVT);
2727   if (((SrcVT == MVT::i32 || SrcVT == MVT::i64) && DestVT == MVT::f32) ||
2728       (SrcVT == MVT::i64 && DestVT == MVT::f64)) {
2761       Fast = DAG.getNode(ISD::STRICT_SINT_TO_FP, dl, { DestVT, MVT::Other },
2763       Slow = DAG.getNode(ISD::STRICT_FADD, dl, { DestVT, MVT::Other },
2775       SDValue SignCvt = DAG.getNode(ISD::SINT_TO_FP, dl, DestVT, Or);
2776       Slow = DAG.getNode(ISD::FADD, dl, DestVT, SignCvt, SignCvt);
2777       Fast = DAG.getNode(ISD::SINT_TO_FP, dl, DestVT, Op0);
2780     return DAG.getSelect(dl, DestVT, SignBitTest, Slow, Fast);
2785           Node->isStrictFPOpcode() ? ISD::STRICT_FADD : ISD::FADD, DestVT))
2789   // treated as signed) is representable in DestVT.  Check that the mantissa
2790   // size of DestVT is >= than the number of bits in SrcVT -1.
2791   assert(APFloat::semanticsPrecision(DAG.EVTToAPFloatSemantics(DestVT)) >=
2797     Tmp1 = DAG.getNode(ISD::STRICT_SINT_TO_FP, dl, { DestVT, MVT::Other },
2800     Tmp1 = DAG.getNode(ISD::SINT_TO_FP, dl, DestVT, Op0);
2832   if (DestVT == MVT::f32)
2839         ISD::EXTLOAD, dl, DestVT, DAG.getEntryNode(), CPIdx,
2848     SDValue Result = DAG.getNode(ISD::STRICT_FADD, dl, { DestVT, MVT::Other },
2854   return DAG.getNode(ISD::FADD, dl, DestVT, Tmp1, FudgeInReg);
2867   EVT DestVT = N->getValueType(0);
2903         DAG.getNode(OpToUse, dl, {DestVT, MVT::Other},
2913       DAG.getNode(OpToUse, dl, DestVT,
2928   EVT DestVT = N->getValueType(0);
2931   EVT NewOutTy = DestVT;
2964   SDValue Trunc = DAG.getNode(ISD::TRUNCATE, dl, DestVT, Operation);