Lines Matching defs:VReg

277     Register VReg = MRI->createVirtualRegister(RC);
279 TII->get(TargetOpcode::IMPLICIT_DEF), VReg);
280 return VReg;
327 Register VReg = getVR(Op, VRBaseMap);
335 // shrink VReg's register class within reason. For example, if VReg == GR32
336 // and II requires a GR32_NOSP, just constrain VReg to GR32_NOSP.
351 = MRI->constrainRegClass(VReg, OpRC, MinNumRegs);
357 TII->get(TargetOpcode::COPY), NewVReg).addReg(VReg);
358 VReg = NewVReg;
361 "Constraining an allocatable VReg produced an unallocatable class?");
391 MIB.addReg(VReg, getDefRegState(isOptDef) | getKillRegState(isKill) |
412 Register VReg = R->getReg();
424 if (OpRC && IIRC && OpRC != IIRC && VReg.isVirtual()) {
427 TII->get(TargetOpcode::COPY), NewVReg).addReg(VReg);
428 VReg = NewVReg;
434 MIB.addReg(VReg, getImplRegState(Imp));
476 Register InstrEmitter::ConstrainForSubReg(Register VReg, unsigned SubIdx,
478 const TargetRegisterClass *VRC = MRI->getRegClass(VReg);
481 // RC is a sub-class of VRC that supports SubIdx. Try to constrain VReg
484 RC = MRI->constrainRegClass(VReg, RC, MinRCSize);
486 // VReg has been adjusted. It can be used with SubIdx operands now.
488 return VReg;
490 // VReg couldn't be reasonably constrained. Emit a COPY to a new virtual
496 .addReg(VReg);
638 unsigned VReg = getVR(Node->getOperand(0), VRBaseMap);
640 // Create the new VReg in the destination class and emit a copy.
646 NewVReg).addReg(VReg);
827 // defines a VReg, it can depend for example on the order blocks are
835 auto AddVRegOp = [&](unsigned VReg) {
837 /* Reg */ VReg, /* isDef */ false, /* isImp */ false,
848 unsigned VReg;
851 VReg = DbgOperand.getVReg();
855 if (!MRI->hasOneDef(VReg)) {
856 AddVRegOp(VReg);
860 DefMI = &*MRI->def_instr_begin(VReg);
862 // Look up the corresponding VReg for the given SDNode, if any.
866 // No VReg -> produce a DBG_VALUE $noreg instead.
871 VReg = getVR(Op, VRBaseMap);
873 // Again, if there's no instruction defining the VReg right now, fix it up
875 if (!MRI->hasOneDef(VReg)) {
876 AddVRegOp(VReg);
880 DefMI = &*MRI->def_instr_begin(VReg);
891 AddVRegOp(VReg);
895 // Find the operand number which defines the specified VReg.
898 if (MO.isReg() && MO.isDef() && MO.getReg() == VReg)
1225 Register VReg = getVR(GluedNode->getOperand(0), VRBaseMap);
1226 MachineOperand MO = MachineOperand::CreateReg(VReg, /*isDef=*/false,