Lines Matching defs:SV0
3007 const APInt &SV0 = N0.getOperand(1)->getConstantOperandAPInt(0);
3009 APInt NewStep = SV0 + SV1;
7871 auto *SV0 = dyn_cast<ShuffleVectorSDNode>(N0);
7873 if (SV0 && SV1 && TLI.isTypeLegal(VT)) {
7887 int M0 = SV0->getMaskElt(i);
7908 // SV0 make the index a LHS index. If it came from SV1, make it
15612 SDValue SV0 = PeekThroughBitcast(N0->getOperand(0));
15614 if (!(SV0 && SV1))
15625 TLI.buildLegalVectorShuffle(VT, SDLoc(N), SV0, SV1, NewMask, DAG);
23945 SDValue SV0 = DAG.getUNDEF(VT), SV1 = DAG.getUNDEF(VT);
23990 if (SV0.isUndef() || SV0 == ExtVec) {
23991 SV0 = ExtVec;
24004 return TLI.buildLegalVectorShuffle(VT, SDLoc(N), DAG.getBitcast(VT, SV0),
26109 SDValue SV0 = BC0->getOperand(0);
26113 std::swap(SV0, SV1);
26119 SV0 = DAG.getBitcast(ScaleVT, SV0);
26122 VT, DAG.getVectorShuffle(ScaleVT, SDLoc(N), SV0, SV1, NewMask));
26133 // Compute the combined shuffle mask for a shuffle with SV0 as the first
26135 // i.e. Merge SVN(OtherSVN, N1) -> shuffle(SV0, SV1, Mask) iff Commute = false
26136 // Merge SVN(N1, OtherSVN) -> shuffle(SV0, SV1, Mask') iff Commute = true
26140 const TargetLowering &TLI, SDValue &SV0, SDValue &SV1,
26147 SV0 = SV1 = SDValue();
26187 if (!SV0.getNode() || SV0 == CurrentVec) {
26190 SV0 = CurrentVec;
26218 if (InnerVec == SV0) {
26245 std::swap(SV0, SV1);
26262 SDValue SV0 = N1->getOperand(0);
26264 bool HasSameOp0 = N0 == SV0;
26296 SDValue SV0, SV1;
26299 SV0, SV1, Mask)) {
26305 SV0 ? SV0 : DAG.getUNDEF(VT),
26333 auto CanMergeInnerShuffle = [&](SDValue &SV0, SDValue &SV1,
26345 MergeInnerShuffle(Commute, SVN, SVN0, Op1, TLI, SV0, SV1,