Lines Matching full:stores

75 // When Stores and Loads maps (or NonAliasStores and NonAliasLoads)
628   /// 1 for loads, 0 for stores. (see comment in SUList)
767   // on it, stores and loads kept separately. Two SUs are trivially
770   Value2SUsMap Stores, Loads(1 /*TrueMemOrderLatency*/);
772   // Certain memory accesses are known to not alias any SU in Stores
782   // These do not depend on one other (or normal loads or stores), but
913       addBarrierChain(Stores);
955         // An unknown store depends on all stores and loads.
956         addChainDependencies(SU, Stores);
962         Stores.insert(SU, UnknownValue);
970           // Add dependencies to previous stores and loads mapped to V.
971           addChainDependencies(SU, (ThisMayAlias ? Stores : NonAliasStores), V);
981           (ThisMayAlias ? Stores : NonAliasStores).insert(SU, V);
984         // stores.
986         addChainDependencies(SU, Stores, UnknownValue);
990         // An unknown load depends on all stores.
991         addChainDependencies(SU, Stores);
1000           // Add precise dependencies against all previously seen stores
1002           addChainDependencies(SU, (ThisMayAlias ? Stores : NonAliasStores), V);
1007         // The load may have dependencies to unanalyzable stores.
1008         addChainDependencies(SU, Stores, UnknownValue);
1013     if (Stores.size() + Loads.size() >= HugeRegion) {
1014       LLVM_DEBUG(dbgs() << "Reducing Stores and Loads maps.\n";);
1015       reduceHugeMemNodeMaps(Stores, Loads, getReductionSize());
1058 void ScheduleDAGInstrs::reduceHugeMemNodeMaps(Value2SUsMap &stores,
1060   LLVM_DEBUG(dbgs() << "Before reduction:\nStoring SUnits:\n"; stores.dump();
1065   NodeNums.reserve(stores.size() + loads.size());
1066   for (const auto &[V, SUs] : stores) {
1101   insertBarrierChain(stores);
1104   LLVM_DEBUG(dbgs() << "After reduction:\nStoring SUnits:\n"; stores.dump();