Lines Matching defs:DefSubReg
419 unsigned DefSubReg;
456 /// \p DefSubReg represents the sub register index the value tracker will
464 ValueTracker(Register Reg, unsigned DefSubReg,
467 : DefSubReg(DefSubReg), Reg(Reg), MRI(MRI), TII(TII) {
1892 if (Def->getOperand(DefIdx).getSubReg() != DefSubReg)
1914 if (DefOp.getSubReg() != DefSubReg)
1987 if (RegSeqInput.SubIdx == DefSubReg)
2020 // 1. DefSubReg == sub1, get v1.
2021 // 2. DefSubReg != sub1, the value may be available through v0.
2024 if (InsertedReg.SubIdx == DefSubReg) {
2042 !(TRI->getSubRegIndexLaneMask(DefSubReg) &
2047 return ValueTrackerResult(BaseReg.Reg, DefSubReg);
2057 // Indeed, if DefSubReg != 0, we would have to compose it with sub0.
2058 if (DefSubReg)
2085 // If DefSubReg != sub0, we would have to check that all the bits
2088 if (DefSubReg != Def->getOperand(3).getImm())
2106 if (Def->getOperand(0).getSubReg() != DefSubReg)
2177 DefSubReg = Res.getSrcSubReg(0);