Lines Matching defs:Reg
59 MachineRegisterInfo::setRegClass(Register Reg, const TargetRegisterClass *RC) {
61 VRegInfo[Reg].first = RC;
64 void MachineRegisterInfo::setRegBank(Register Reg,
66 VRegInfo[Reg].first = &RegBank;
70 constrainRegClass(MachineRegisterInfo &MRI, Register Reg,
81 MRI.setRegClass(Reg, NewRC);
86 Register Reg, const TargetRegisterClass *RC, unsigned MinNumRegs) {
87 if (Reg.isPhysical())
89 return ::constrainRegClass(*this, Reg, getRegClass(Reg), RC, MinNumRegs);
93 MachineRegisterInfo::constrainRegAttrs(Register Reg,
96 const LLT RegTy = getType(Reg);
103 const auto &RegCB = getRegClassOrRegBank(Reg);
105 setRegClassOrRegBank(Reg, ConstrainingRegCB);
111 *this, Reg, cast<const TargetRegisterClass *>(RegCB),
118 setType(Reg, ConstrainingRegTy);
123 MachineRegisterInfo::recomputeRegClass(Register Reg) {
125 const TargetRegisterClass *OldRC = getRegClass(Reg);
134 for (MachineOperand &MO : reg_nodbg_operands(Reg)) {
143 setRegClass(Reg, NewRC);
148 Register Reg = Register::index2VirtReg(getNumVirtRegs());
149 VRegInfo.grow(Reg);
150 RegAllocHints.grow(Reg);
151 insertVRegByName(Name, Reg);
152 return Reg;
166 Register Reg = createIncompleteVirtualRegister(Name);
167 VRegInfo[Reg].first = RegClass;
168 noteNewVirtualRegister(Reg);
169 return Reg;
174 Register Reg = createIncompleteVirtualRegister(Name);
175 VRegInfo[Reg].first = RegAttr.RCOrRB;
176 setType(Reg, RegAttr.Ty);
177 noteNewVirtualRegister(Reg);
178 return Reg;
183 Register Reg = createIncompleteVirtualRegister(Name);
184 VRegInfo[Reg].first = VRegInfo[VReg].first;
185 setType(Reg, getType(VReg));
186 noteCloneVirtualRegister(Reg, VReg);
187 return Reg;
198 Register Reg = createIncompleteVirtualRegister(Name);
200 VRegInfo[Reg].first = static_cast<RegisterBank *>(nullptr);
201 setType(Reg, Ty);
202 noteNewVirtualRegister(Reg);
203 return Reg;
212 Register Reg = Register::index2VirtReg(i);
213 if (!VRegInfo[Reg].second)
215 verifyUseList(Reg);
217 << printReg(Reg, getTargetRegisterInfo()) << "...\n";
218 for (MachineInstr &MI : reg_instructions(Reg))
228 void MachineRegisterInfo::verifyUseList(Register Reg) const {
231 for (MachineOperand &M : reg_operands(Reg)) {
235 errs() << printReg(Reg, getTargetRegisterInfo())
244 errs() << printReg(Reg, getTargetRegisterInfo())
250 errs() << printReg(Reg, getTargetRegisterInfo())
255 if (MO->getReg() != Reg) {
256 errs() << printReg(Reg, getTargetRegisterInfo())
287 MO->Contents.Reg.Prev = MO;
288 MO->Contents.Reg.Next = nullptr;
295 MachineOperand *Last = Head->Contents.Reg.Prev;
298 Head->Contents.Reg.Prev = MO;
299 MO->Contents.Reg.Prev = Last;
305 MO->Contents.Reg.Next = Head;
309 MO->Contents.Reg.Next = nullptr;
310 Last->Contents.Reg.Next = MO;
322 MachineOperand *Next = MO->Contents.Reg.Next;
323 MachineOperand *Prev = MO->Contents.Reg.Prev;
329 Prev->Contents.Reg.Next = Next;
331 (Next ? Next : Head)->Contents.Reg.Prev = Prev;
333 MO->Contents.Reg.Prev = nullptr;
334 MO->Contents.Reg.Next = nullptr;
364 MachineOperand *Prev = Src->Contents.Reg.Prev;
365 MachineOperand *Next = Src->Contents.Reg.Next;
374 Prev->Contents.Reg.Next = Dst;
378 (Next ? Next : Head)->Contents.Reg.Prev = Dst;
409 MachineInstr *MachineRegisterInfo::getVRegDef(Register Reg) const {
411 def_instr_iterator I = def_instr_begin(Reg);
420 MachineInstr *MachineRegisterInfo::getUniqueVRegDef(Register Reg) const {
421 if (def_empty(Reg)) return nullptr;
422 def_instr_iterator I = def_instr_begin(Reg);
436 bool MachineRegisterInfo::hasAtMostUserInstrs(Register Reg,
438 return hasNItemsOrLess(use_instr_nodbg_begin(Reg), use_instr_nodbg_end(),
446 void MachineRegisterInfo::clearKillFlags(Register Reg) const {
447 for (MachineOperand &MO : use_operands(Reg))
451 bool MachineRegisterInfo::isLiveIn(Register Reg) const {
453 if ((Register)LI.first == Reg || LI.second == Reg)
508 LaneBitmask MachineRegisterInfo::getMaxLaneMaskForVReg(Register Reg) const {
510 assert(Reg.isVirtual());
511 const TargetRegisterClass &TRC = *getRegClass(Reg);
516 LLVM_DUMP_METHOD void MachineRegisterInfo::dumpUses(Register Reg) const {
517 for (MachineInstr &I : use_instructions(Reg))
547 void MachineRegisterInfo::markUsesInDebugValueAsUndef(Register Reg) const {
548 // Mark any DBG_VALUE* that uses Reg as undef (but don't delete it.)
550 for (MachineInstr &UseMI : llvm::make_early_inc_range(use_instructions(Reg))) {
551 if (UseMI.isDebugValue() && UseMI.hasDebugOperandForReg(Reg))
613 void MachineRegisterInfo::disableCalleeSavedRegister(MCRegister Reg) {
616 assert(Reg && (Reg < TRI->getNumRegs()) &&
632 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)