Lines Matching +full:mc +full:- +full:sid
1 //===- MIParser.cpp - Machine instructions parser implementation ----------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
59 #include "llvm/MC/LaneBitmask.h"
60 #include "llvm/MC/MCContext.h"
61 #include "llvm/MC/MCDwarf.h"
62 #include "llvm/MC/MCInstrDesc.h"
111 for (unsigned I = 0, E = TRI->getNumRegs(); I < E; ++I) {
113 Names2Regs.insert(std::make_pair(StringRef(TRI->getName(I)).lower(), I))
116 assert(WasInserted && "Expected registers to be unique case-insensitively");
126 Reg = RegInfo->getValue();
135 for (unsigned I = 0, E = TII->getNumOpcodes(); I < E; ++I)
136 Names2InstrOpCodes.insert(std::make_pair(StringRef(TII->getName(I)), I));
145 OpCode = InstrInfo->getValue();
154 ArrayRef<const uint32_t *> RegMasks = TRI->getRegMasks();
155 ArrayRef<const char *> RegMaskNames = TRI->getRegMaskNames();
167 return RegMaskInfo->getValue();
174 for (unsigned I = 1, E = TRI->getNumSubRegIndices(); I < E; ++I)
176 std::make_pair(TRI->getSubRegIndexName(I), I));
184 return SubRegInfo->getValue();
192 auto Indices = TII->getSerializableTargetIndices();
202 Index = IndexInfo->second;
212 auto Flags = TII->getSerializableDirectMachineOperandTargetFlags();
224 Flag = FlagInfo->second;
234 auto Flags = TII->getSerializableBitmaskMachineOperandTargetFlags();
246 Flag = FlagInfo->second;
256 auto Flags = TII->getSerializableMachineMemOperandTargetFlags();
267 Flag = FlagInfo->second;
276 for (unsigned I = 0, E = TRI->getNumRegClasses(); I < E; ++I) {
277 const auto *RC = TRI->getRegClass(I);
279 std::make_pair(StringRef(TRI->getRegClassName(RC)).lower(), RC));
293 for (unsigned I = 0, E = RBI->getNumRegBanks(); I < E; ++I) {
294 const auto &RegBank = RBI->getRegBank(I);
305 return RegClassInfo->getValue();
312 return RegBankInfo->getValue();
325 Info->VReg = MRI.createIncompleteVirtualRegister();
326 I.first->second = Info;
328 return *I.first->second;
337 Info->VReg = MF.getRegInfo().createIncompleteVirtualRegister(RegName);
338 I.first->second = Info;
340 return *I.first->second;
346 if (Slot == -1)
503 bool parseSectionID(std::optional<MBBSectionID> &SID);
601 Loc - Source.data(), SourceMgr::DK_Error, Msg.str(),
610 (Loc - Source.data()));
648 bool MIParser::parseSectionID(std::optional<MBBSectionID> &SID) {
655 SID = MBBSectionID{Value};
659 SID = MBBSectionID::ExceptionSectionID;
661 SID = MBBSectionID::ColdSectionID;
777 MF.getFunction().getValueSymbolTable()->lookup(Name));
790 MBB->setAlignment(Align(Alignment));
792 MBB->setMachineBlockAddressTaken();
794 MBB->setAddressTakenIRBlock(AddressTakenIRBlock);
795 MBB->setIsEHPad(IsLandingPad);
796 MBB->setIsInlineAsmBrIndirectTarget(IsInlineAsmBrIndirectTarget);
797 MBB->setIsEHFuncletEntry(IsEHFuncletEntry);
799 MBB->setSectionID(*SectionID);
807 MBB->setBBID(BBID.value());
809 MBB->setCallFrameSize(CallFrameSize);
846 --BraceDepth;
878 "Use correct get-function for lane mask");
979 PrevMI->setFlag(MachineInstr::BundledSucc);
980 MI->setFlag(MachineInstr::BundledPred);
988 MI->setFlag(MachineInstr::BundledSucc);
1032 if (!AddFalthroughFrom->isSuccessor(MBB))
1033 AddFalthroughFrom->addSuccessor(MBB);
1034 AddFalthroughFrom->normalizeSuccProbs();
1112 return error("expected an integer literal after 'cfi-type'");
1113 // getUnsigned is sufficient for 32-bit integers.
1126 return error("expected an integer literal after 'debug-instr-number'");
1146 return error("expected a metadata node after 'debug-location'");
1169 const auto &MCID = MF.getSubtarget().getInstrInfo()->get(OpCode);
1177 MI->setFlags(Flags);
1182 MI->addOperand(MF, Operand.Operand);
1187 MI->setPreInstrSymbol(MF, PreInstrSymbol);
1189 MI->setPostInstrSymbol(MF, PostInstrSymbol);
1191 MI->setHeapAllocMarker(MF, HeapAllocMarker);
1193 MI->setPCSections(MF, PCSections);
1195 MI->setCFIType(MF, CFIType);
1197 MI->setMemRefs(MF, MemOperands);
1199 MI->setDebugInstrNum(InstrNum);
1312 FI->second.first->replaceAllUsesWith(MD);
1390 MD = NodeInfo->second.get();
1396 MD = NodeInfo->second.get();
1411 return MO.isDef() ? "implicit-def" : "implicit";
1417 return StringRef(TRI->getName(Reg)).lower();
1459 // clang-format off
1477 // clang-format on
1564 Reg = Info->VReg;
1691 return error("expected an integer literal after 'tied-def'");
1707 // to check the tied-def operand.
1711 Twine("use of invalid tied-def operand index '" +
1718 Twine("use of invalid tied-def operand index '") +
1721 // Check that the tied-def operand wasn't tied elsewhere.
1725 Twine("the tied-def operand #") + Twine(DefIdx) +
1773 // Try a redundant low-level type.
1776 return error("expected tied-def or low-level type after '('");
1809 if (RegInfo->Kind == VRegInfo::GENERIC ||
1810 RegInfo->Kind == VRegInfo::REGBANK)
1869 -> bool { return error(Loc, Msg); }))
1894 [this](StringRef::iterator Loc, const Twine &Msg) -> bool {
1900 if (parseIRConstant(Loc, StringRef(Loc, Token.range().end() - Loc), C))
2075 return ErrCB(Token.location(), "expected 32-bit integer (too large)");
2084 return ErrCB(Token.location(), "expected 32-bit integer (too large)");
2093 Token, Result, [this](StringRef::iterator Loc, const Twine &Msg) -> bool {
2108 MBB = MBBInfo->second;
2111 if (!Token.stringValue().empty() && Token.stringValue() != MBB->getName())
2137 MF.getFrameInfo().getObjectAllocation(ObjectInfo->second))
2138 Name = Alloca->getName();
2143 FI = ObjectInfo->second;
2162 return error(Twine("use of undefined fixed stack object '%fixed-stack.") +
2165 FI = ObjectInfo->second;
2183 GV = M->getNamedValue(Token.stringValue());
2208 [this](StringRef::iterator Loc, const Twine &Msg) -> bool {
2246 return error("use of undefined jump table '%jump-table." + Twine(ID) + "'");
2248 Dest = MachineOperand::CreateJTI(JumpTableEntryInfo->second);
2300 Node = NodeInfo->second.get();
2389 // true/false in MIR yet. Do it ad-hoc until there's something else
2450 int DwarfReg = TRI->getDwarfRegNum(LLVMReg, true);
2476 return error("expected a 8-bit integer (too large)");
2594 F.getValueSymbolTable()->lookup(Token.stringValue()));
2605 return error(Twine("use of undefined IR block '%ir-block.") +
2666 ID = static_cast<Intrinsic::ID>(TII->lookupName(Name));
2707 return error("invalid floating-point predicate");
2743 ShufMask.push_back(-1);
2766 return error("expected syntax dbg-instr-ref(<unsigned>, <unsigned>)");
2776 return error("expected syntax dbg-instr-ref(<unsigned>, <unsigned>)");
2786 return error("expected syntax dbg-instr-ref(<unsigned>, <unsigned>)");
2959 if (const auto *Formatter = TII->getMIRFormatter()) {
3024 return error("expected 64-bit integer (too large)");
3027 Offset = -Offset;
3055 return error("expected a power-of-2 literal after 'align'");
3083 V = PFS.MF.getFunction().getValueSymbolTable()->lookup(Token.stringValue());
3121 Token, PFS, V, [this](StringRef::iterator Loc, const Twine &Msg) -> bool {
3129 return error("expected 64-bit integer (too large)");
3138 return error("expected 64-bit integer (too large)");
3230 "expected a global value or an external symbol after 'call-entry'");
3236 if (const auto *Formatter = TII->getMIRFormatter()) {
3237 if (Formatter->parseCustomPseudoSourceValue(
3239 [this](StringRef::iterator Loc, const Twine &Msg) -> bool {
3277 if (V && !V->getType()->isPointerTy())
3369 return error("expected memory LLT, the size integer literal or 'unknown-size' after "
3419 if (Ptr.Offset & (Alignment - 1)) {
3421 // alignment of offset, so this just guards against hand-written MIR
3474 "Invalid token for a pre- post-instruction symbol!");
3477 return error("expected a symbol after 'pre-instr-symbol'");
3496 return error("expected a MDNode after 'heap-alloc-marker'");
3532 if (Slot == -1)